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检索条件"任意字段=Proceedings of the sixteenth workshop on Parallel and distributed simulation"

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Super-criticality revisited

Super-criticality revisited

引用

workshop on Principles of Advanced and distributed simulation (PADS)

作者： S. Srinivasan P.F. Reynolds Department of Computer Science University of Virginia-Thornton Hall Charlottesville VA USA

Critical path analysis has been suggested as a technique for establishing a lower bound on the completion times of parallel discrete event simulations. A protocol is super-critical if there is at least one simulation that can complete in less than the critical path time using that protocol. Previous studies have shown that several practical protocols are super-critical while others are not. We present a sufficient condition to demonstrate that a protocol is super-critical. Also, we show that a condition used in a previous study is not sufficient but is necessary for super-criticality. It has been claimed that super-criticality requires independence of one or more messages (states) on events in the logical past of those messages (states). We present an example which contradicts this claim and examine the implications of this contradiction on lower bounds.< >

关键词： Protocols Discrete event simulation Sufficient conditions Safety Computer science Analytical models Event detection

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Iterated Runge-Kutta methods on distributed memory multiprocessors

Iterated Runge-Kutta methods on distributed memory multiproc...

引用

Euromicro workshop on parallel and distributed Processing

作者： T. Rauber G. Runger Computer Science Department Universität des Saarlandes Saarbruecken Germany

In this article, we consider the iterated Runge-Kutta (IRK) method which is an iteration method based on a predictor-corrector scheme for the solution of ordinary differential equations. The method uses embedded formulae to control the stepsize. We present different algorithms of the IRK method on distributed memory multiprocessors using appropriate communication primitives. The theoretical performance analysis and a runtime simulation allow us to value the presented algorithms. An implementation on the Intel iPSC/860 confirms the predicted runtimes.< >

关键词： Runtime Differential equations Communication system control Partial differential equations Performance analysis parallel algorithms Computer science Analytical models Predictive models Power engineering and energy

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parallel discrete-event simulation (PDES): a case study in design, development, and performance using SPEEDES

Parallel discrete-event simulation (PDES): a case study in d...

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workshop on Principles of Advanced and distributed simulation (PADS)

作者： F. Wieland E. Blair T. Zukas MITRE Corporation McLean VA USA

Can parallel simulations efficiently exploit a network of workstations? Why haven't PDES models followed standard modeling methodologies? Will the field of PDES survive, and if so, in what form? Researchers in the PDES field have addressed these questions and others in a series of papers published in the last few years. The purpose of this paper is to shed light on these questions, by documenting on actual case study of the development of an optimistically synchronized PDES application on a network of workstations. This paper is unique in that its focus is not necessarily on performance, but on the whole process of developing a model, from the physical system being simulated, through its conceptual design, validation, implementation, and, of course, its performance. This paper also presents the first reported performance results indicating the impact of risk on performance. The results suggest that the optimal value of risk is sensitive to the latency parameters of the communications network.< >

关键词： Discrete event simulation Computer aided software engineering Delay Airports Air traffic control Workstations Aircraft manufacture Intelligent networks Communication networks Operations research

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A distributed computer architecture for qualitative simulation based on a multi-DSP and FPGAs

A distributed computer architecture for qualitative simulati...

引用

Euromicro workshop on parallel and distributed Processing

作者： M. Platzner B. Rinner R. Weiss Institute for Technical Informatics Graz University of Technology Austria Technische Universitat Graz Graz Steiermark AT Inst. for Tech. Inf. Graz Univ. of Technol. Austria

The design of a specialized computer architecture for qualitative simulation is presented. Our interest focuses on the hardware design of an application-specific computer architecture which is composed of programmable processors (digital signal processors TMS320C40) and application-specific integrated circuits (FPGAs). Two design strategies are considered to improve the performance. Primitive functions are hardware-implemented using FPGAs (software/hardware migration). More complex functions are mapped onto a multi processor system formed by TMS320C40. This computer architecture is designed for the well known algorithm for qualitative simulation-QSIM. In this paper we present the design of a computer architecture for the constraint-check-function-a function of the QSIM kernel.< >

关键词： Computer architecture Computational modeling Computer simulation Circuit simulation Hardware Field programmable gate arrays Signal design Digital signal processors Application specific integrated circuits Algorithm design and analysis

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Flexible data parallel training of neural networks using MIMD-Computers

Flexible data parallel training of neural networks using MIM...

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Euromicro workshop on parallel and distributed Processing

作者： M. Besch H.W. Pohl German National Research Center for Computer Science GMD FIRST Berlin Germany German Nat. Res. Center for Comput. Sci. Berlin Germany

An approach to flexible and efficient data parallel simulation of neural networks on large scale MIMD machines is presented. We regard the exploitation of the inherent parallelism of neural network models as necessary if larger networks and training data sets respectively are to be considered. Nevertheless it is essential to provide the flexibility for investigating various training algorithms or creating new ones without intimate knowledge of the underlaying hardware architecture and communication subsystem. We therefore encapsulated functional units being substantial with respect to the parallel execution. Based on these components even complex training algorithms can be formulated as a sequential program while the details of the parallelization are transparent. Communication tasks are performed very efficiently by using a distributed logarithmic tree. This logical structure additionally allows a direct mapping of the algorithm on various important parallel architectures. Finally a theoretical time complexity model is given and the correspondence to empirical data is shown.< >

关键词： Neural networks parallel processing Concurrent computing Backpropagation algorithms Object oriented modeling Computational modeling Computer simulation Large-scale systems parallel algorithms distributed computing

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VIZIR: an integrated environment for distributed program visualization

VIZIR: an integrated environment for distributed program vis...

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International Symposium on Modeling, Analysis and simulation of Computer and Telecommunication Systems (MASCOTS)

作者： M.C. Hao A.H. Karp A. Waheed M. Jazayeri Hewlett Packard Research Laboratories Palo Alto CA USA

VIZIR provides an integrated mechanism for on-line debugging, performance analysis, and data visualization of message-passing parallel applications. The current VIZIR includes: (1) a mechanism to multicast window-based commands, message passing and program execution events among tasks; (2) the ability to select groups of tasks to interact these events; (3) a means to report when these events cause errors in the tasks; and (4) ad hoc visualization of distributed arrays using existing visualizers.< >

关键词： Data visualization Debugging distributed computing Computer networks parallel architectures Performance analysis Message passing parallel processing Concurrent computing parallel machines

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Load balancing in parallel and distributed processing of tree-based multiple-task jobs

Load balancing in parallel and distributed processing of tre...

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Euromicro workshop on parallel and distributed Processing

作者： L. Borzemski Institute of Control and Systems Engineering Technical University of Wroclaw Wroclaw Poland

The efficient processing of tree based multiple task jobs arriving in batches to parallel and distributed systems is presented. This type of processing can be found in such application fields as, for example, automatic diagnostics and document recognition. A key management issue in such systems is task allocation. Load balancing is often proposed as the task allocation approach. The load balancing algorithms are employed to improve the throughput of the system by distribution of the incoming workload evenly among the processors in the system. The problem-specific static algorithms as well as general dynamic load balancing algorithms have been developed for supporting batch processing of tree based multiple task jobs. The proposed algorithms have been studied through simulation. Prescheduling load balancing algorithms have been evaluated as superior to other algorithms investigated.< >

关键词： Load management distributed processing Decision making Decision trees Application software Throughput distributed computing Character recognition Pattern recognition Automatic control

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Effectiveness of global event queues in rollback reduction and load balancing

Effectiveness of global event queues in rollback reduction a...

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workshop on Principles of Advanced and distributed simulation (PADS)

作者： S.K. Prasad B. Naqib Mathematics and Computer Science Georgia State University Atlanta USA

Compared to highly optimized optimistic simulators which use local event queues for individual processors on a shared-memory computer, we demonstrate that employing a single global event queue drastically reduces the number of rollbacks, brings down the storage requirements, and achieves superior load balance. On a bus-based Silicon Graphics multiprocessor, these virtues consistently translated into faster execution times and higher speedups on those synthetic networks of medium- to coarse-grained logical processes which were ridden with rollbacks and load imbalance on local-queue-based simulators. A dynamic randomization-based load distribution scheme for local-event-queue simulators is also shown to be an effective improvement.< >

关键词： Load management Discrete event simulation Computational modeling Computer simulation Clocks Mathematics Computer science Silicon Computer graphics Partitioning algorithms

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Using PVM to implement a distributed dependable simulation system

Using PVM to implement a distributed dependable simulation s...

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Euromicro workshop on parallel and distributed Processing

作者： V. Gianuzzi F. Merani Dipartimento di Informatica e Scienze dellInformazione Università di Genova Genoa Italy

In the past decade, the use of distributed algorithms to model simulations is considerably increased, in order to gain speedup over traditional sequential simulations. Also, there has been much interest in using inexpensive, powerful workstation nets, with high speed interconnection, instead of expensive parallel computers. In this paper, we briefly present the kernel of a distributed system (PV/sup 2/M) implemented on top of PVM routines, where synchronization is based on the concept of Virtual Time. Special emphasis is given to the fault tolerant mechanisms provided in it. PV/sup 2/M implements a checkpoint-restart mechanism, with respect to processes located on non master hosts, in such a way as to be 1-resilient with respect to failures occurring to these hosts.< >

关键词： Workstations Clocks Power system interconnection Synchronization distributed algorithms Power system modeling Computational modeling Concurrent computing Kernel Fault tolerance

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A fast asynchronous GVT algorithm for shared memory multiprocessor architectures

A fast asynchronous GVT algorithm for shared memory multipro...

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workshop on Principles of Advanced and distributed simulation (PADS)

作者： Z. Xiao F. Gomes B. Unger J. Cleary University of Calgary Canada University of Waikato New Zealand

The computation of Global Virtual Time is of fundamental importance in Time Warp based parallel Discrete Event simulation Systems. Shared memory multiprocessor architectures can support interprocess communication with much smaller overheads than distributed memory systems. This paper presents a new, completely asynchronous, Gvt algorithm which provides very fast and accurate Gvt estimation with significantly lower overhead than previous approaches. The algorithm presented is able to support more efficient memory management, termination, and other global control mechanisms. The Gvt algorithm described enables any Time Warp entity to compute Gvt at any time without slowing down other entities, in particular those executing on the critical path. Experimental results are presented for a shared memory Time Warp system that employs a two tiered distributed memory management scheme. The proof of the correctness and the accuracy of the algorithm are also presented. Finally, some suggestions on possible further optimization of the implementation are given.< >

关键词： Memory architecture Memory management Concurrent computing Discrete event simulation Computer architecture Computational modeling Algorithm design and analysis Costs Termination of employment Message passing

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