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An agent-based DDM for High Level Architecture

An agent-based DDM for High Level Architecture

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workshop on Principles of Advanced and distributed simulation (PADS)

作者： G. Tan Liang Xu F. Moradi S. Taylor School of Computing National University of Singapore Singapore Swedish Defence Research Agency Sweden Department of Info. Sys. & Computing Brunei University Uxbridge UK

ISBN: (纸本)076951104X

The Data Distribution Management (DDM) service is one of the six services provided in the Runtime Infrastructure (RTI) of High Level Architecture (HLA). Its purpose is to perform data filtering and reduce irrelevant data communicated between federates. The two DDM schemes proposed for RTI, region based and grid based DDM, are oriented to send as little irrelevant data to subscribers as possible, but only manage to filter part of this information and some irrelevant data is still being communicated. Previously (G. Tan et al., 2000), we employed intelligent agents to perform data filtering in HLA, implemented an agent based DDM in RTI (ARTI) and compared it with the other two filtering mechanisms. The paper reports on additional experiments, results and analysis using two scenarios: the AWACS sensing aircraft simulation and the air traffic control simulation scenario. Experimental results show that compared with other mechanisms, the agent based approach communicates only relevant data and minimizes network communication, and is also comparable in terms of time efficiency. Some guidelines on when the agent based scheme can be used are also given.

关键词： distributed decision making Air traffic control Analytical models Runtime Information filtering Information filters Intelligent agent Aircraft Aerospace control Guidelines

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Disseminating critical target-specific synchronization information in parallel discrete event simulations 93

Disseminating critical target-specific synchronization infor...

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proceedings of the seventh workshop on parallel and distributed simulation

作者： Carmen M. Pancerella Paul F. Reynolds

ISBN: (纸本)9781565550551

A hardware-based framework which supports a wide range of parallel discrete event synchronization protocols has been proposed in [Reyn92]. This framework offloads all synchronization activity from the host processors and host communication network in the system. The underlying hardware computes results of global, binary associative operations, or global reductions. In this paper we present results of simulations that strongly suggest the need for a next-generation reduction network which computes and disseminates results of target-specific reductions to support both aggressive and non-aggressive parallel discrete event simulations. Target-specific reductions allow a logical process to receive synchronization information only from those logical processes which may have a direct or indirect impact on its performance.

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Hierarchical strategy of model partitioning for VLSI-design using an improved mixture of experts approach 96

Hierarchical strategy of model partitioning for VLSI-design ...

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proceedings of the tenth workshop on parallel and distributed simulation

作者： K. Hering R. Haupt Th. Villmann Universität Leipzig Inst. für Informatik Augustusplatz 10/11 04109 Leipzig Germany Inst. für Techno- und Wirtschaftsmathematik E.-Schrödinger-Str. Geb. 48/575 67663 Kaiserslautern Germany

ISBN: (纸本)9780818675393

The partitioning of complex processor models on the gate and register-transfer level for parallel functional simulation based on the clock-cycle algorithm is considered. We introduce a hierarchical partitioning scheme combining various partitioning algorithms in the frame of a competing strategy. Melting together different partitioning results within one level using superpositions we crossover to a mixture of experts one. This approach is improved applying genetic algorithms. In addition we present two new partitioning algorithms both of them taking cones as fundamental units for building partitions.

关键词： Logic simulation VLSI-Design Genetic Algorithms Partitioning

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Performance prediction tools for parallel discrete-event simulation 99

Performance prediction tools for parallel discrete-event sim...

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proceedings of the thirteenth workshop on parallel and distributed simulation

作者： Chu-Cheow Lim Yoke-Hean Low Boon-Ping Gan Sanjay Jain Wentong Cai Wen Jing Hsu Shell Ying Huang Gintic Institute of Manufacturing Technology 71 Nanyang Drive Singapore 638075 Singapore Centre for Advanced Information Systems School of Applied Science Nanyang Technological University Singapore 639798 Singapore

ISBN: (纸本)9780769501550

We have developed a set of performance prediction tools which help to estimate the achievable speedups from parallelizing a sequential simulation. The tools focus on two important factors in the actual speedup of a parallel simulation program : (a) the simulation protocol used, and (b) the inherent parallelism in the simulation model. The first two tools are a performance/parallelism analyzer for a conservative, asynchronous simulation protocol, and a similar analyzer for a conservative, synchronous ("super-step") protocol. Each analyzer allows us to study how the speedup of a model changes with increasing number of processors, when a specific protocol is used. The third tool -- a critical path analyzer -- gives an ideal upper bound to the model's speedup. This paper gives an overview of the prediction tools, and reports the predictions from applying the tools to a discrete-event wafer fabrication simulation model. The predictions are close to speedups from actual parallel implementations. These tools help us to set realistic expectations of the speedup from a parallel simulation program, and to focus our work on issues which are more likely to yield performance improvement.

关键词： parallel processing discrete event simulation software performance evaluation integrated circuit manufacture performance prediction tools parallel discrete-event simulation sequential simulation parallelization simulation protocol conservative asynchronous simulation conservative synchronous simulation critical path analyzer upper bound wafer fabrication simulation performance improvement

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Simple and efficient transactions for a distributed object store

Simple and efficient transactions for a distributed object s...

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International workshop on Database and Expert Systems Applications

作者： L. Boeszoermenyi C. Welch Institut fuer Informatik Universitaet Klagenfurt Klagenfurt Austria Alpen-Adria-Universitat Klagenfurt Klagenfurt KÃ¤rnten AT

Even the more or less "canonical", lower-level architecture of information systems needs to be revisited from time to time. Notions like persistence and transactions belong traditionally to the area of database management systems. There are, however many applications, such as CAD, VLSI design or simulation, which need persistence and could take advantage of transactions, but require especially fast implementations not provided by DBMS. We describe a low-level transaction concept used to implement our parallel main memory object store (PPOST), to provide main memory access times combined with the safety and convenience of transactions.

关键词： Electrical capacitance tomography World Wide Web Very large scale integration Postal services Electronic switching systems Read only memory Transaction databases Proposals Law Legal factors

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Empirical study of parallel trace-driven LRU cache simulators 95

Empirical study of parallel trace-driven LRU cache simulator...

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proceedings of the ninth workshop on parallel and distributed simulation

作者： David Nicol Eric Carr Department of Computer Science College of William and Mary Williamsburg VA Department of Math and Computer Science Carleton College Northfield MN

ISBN: (纸本)9780818671203

This paper reports on the performance of four parallel algorithms for simulating an associative cache operating under the LRU (Least-Recently-Used) replacement policy. Three of the algorithms are implemented on the MasPar MP-2. Another algorithm is a parallelization of an efficient serial algorithm on the Intel Paragon. We assess the strengths and weaknesses of these algorithms as a function of problem size and characteristics, and compare their performance on traces derived from execution of three SPEC92 benchmark programs.

关键词： associative cache content-addressable storage storage management cache storage parallel algorithms SPEC92 benchmark programs parallel trace-driven LRU cache simulators Least-Recently-Used replacement policy Intel Paragon efficient serial algorithm MasPar MP-2 virtual machines

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Experiments in automated load balancing 96

Experiments in automated load balancing

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proceedings of the tenth workshop on parallel and distributed simulation

作者： Linda F. Wilson David M. Nicol Institute for Computer Applications Science and Engineering NASA Langley Research Center Hampton VA Department of Computer Science The College of William and Mary P.O. Box 8795 Williamsburg VA

ISBN: (纸本)9780818675393

One of the promises of parallelized discrete-event simulation is that it might provide significant speedups over sequential simulation. In reality, high performance cannot be achieved unless the system is fine-tuned to balance computation, communication, and synchronization requirements. In this paper, we discuss our experiments in automated load balancing using the SPEEDES simulation framework. Specifically, we examine three mapping algorithms that use run-time measurements. Using simulation models of queuing networks and the National Airspace System, we investigate (i) the use of run-time data to guide mapping, (ii) the utility of considering communication costs in a mapping algorithm, (iii) the degree to which computational ``hot-spots'' ought to be broken up in the linearization, and (iv) the relative execution costs of the different algorithms. We compare the performance of the three algorithms using results from the Intel Paragon.

关键词： load balancing discrete-event simulation parallel computing performance analysis

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distributed motion planning for modular robots with unit-compressible modules

Distributed motion planning for modular robots with unit-com...

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IEEE International workshop on Intelligent Robots and Systems (IROS)

作者： Z. Butler S. Byrnes D. Rus Department of Computer Science Dartmouth College USA

The ability of self-reconfigurable robots to solve a variety of robot tasks comes in part from their use of a large number of modules. Effective use of these systems requires parallel actuation and planning, both for efficiency and independence from a central controller. This paper presents the PacMan algorithm, a technique for distributed actuation and planning. This algorithm was developed for systems with unit-compressible modules, such as the crystalline robot. We also describe some analytical properties of the PacMan planning and actuation, and discuss simulation and hardware experiments.

关键词： Motion planning Centralized control Crystallization Control systems parallel robots Legged locomotion Robotics and automation Shape control Computer science Educational institutions

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Speculative parallel simulation with an adaptive throttle scheme 97

Speculative parallel simulation with an adaptive throttle sc...

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proceedings of the eleventh workshop on parallel and distributed simulation

作者： Seng Chuan Tay Yong Meng Teo Siew Theng Kong Department of Information Systems & Computer Science National University of Singapore Lower Kent Ridge Road Singapore 119260

ISBN: (纸本)9780818679650

Excessive rollback recoveries due to overoptimistic event execution in Time Warp simulators often degrade their runtime performance. This paper presents a two-sided throttling scheme to dynamically adjust the event execution speed of Time Warp simulators. The proposed throttle is based on a new concept called global progress window, which allows the individual simulation process to be positioned on a global time scale, thereby to accelerate or suspend their event execution. As each simulation process can be throttled to a steady state, excessive rollback recoveries due to causality errors can be avoided. To quantify the effect of rollbacks and for purpose of comparing different Time Warp implementations, we propose two new measures called RPE (number of Rollback events Per committed Event), and E (relative Effectiveness in reducing rollback overhead). Our implementation results show that the proposed throttle effectively regulates the proceeding of each simulation process, resulting in a significant reduction in rollback thrashing and elapsed time.

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Trajectory control of n-link robot manipulator based on modular neurocontroller

Trajectory control of n-link robot manipulator based on modu...

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IEEE International workshop on Intelligent Robots and Systems (IROS)

作者： P.J. Alsina N.S. Gehlot Departamento Engenharia Eletrica Universidade Federal da Paraiba Campina Grande Paraiba Brazil

In this paper, a modular neurocontroller for an arbitrary N-DOF (degree of freedom) manipulator is proposed. The recursive nature of the Newton-Euler formulation is used as a base for the modular neurocontroller. The neural modules can be trained by the direct inverse or indirect adaptive control schemes. Computer simulation results for a 2-DOF SCARA manipulator are given. Due to its modular structure, this neurocontroller can be applied to a manipulator with arbitrary degrees of freedom such as distributed or cellular robotic systems.

关键词： Robot control Neurocontrollers Manipulator dynamics Neural networks Torque Computer simulation Robustness Parameter estimation parallel processing Programmable control

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