The paper presents a modeling and simulation method to evaluate the performance of distributed computer control systems (DCCSs). Task response time, resource utilization, and network delay are considered as performanc...
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ISBN:
(纸本)0818675152
The paper presents a modeling and simulation method to evaluate the performance of distributed computer control systems (DCCSs). Task response time, resource utilization, and network delay are considered as performance indices for time critical systems. The proposed DCCS model is composed of nodes, network, and environment model and their sub models are also described. The suggested method is applied to the DCCS of CAL (Continuous Annealing Line) in a steel plant and a new DCCS with an open network, in order to estimate the sustain performance.
For the performability evaluation of complex soft real time systems, simulation often remains the only feasible method. simulation experiments tend to be very time consuming if rare events have to be considered. The p...
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For the performability evaluation of complex soft real time systems, simulation often remains the only feasible method. simulation experiments tend to be very time consuming if rare events have to be considered. The paper describes a fast simulation approach for rare events implemented in a Petri net tool. The technique is based on the recently developed RESTART method, which is applicable for rare events in a wide range of simulation models and has the potential to drastically reduce the simulation overhead. The paper presents selection and refinement techniques for thresholds, which are the most important input parameters of RESTART. The results show run length reductions up to six orders of magnitude.
ITL and Tempura are used for respectively the formal specification and simulation of a large scale system, namely the general purpose multi threaded dataflow processor EP/3. The paper shows that this processor can be ...
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ITL and Tempura are used for respectively the formal specification and simulation of a large scale system, namely the general purpose multi threaded dataflow processor EP/3. The paper shows that this processor can be specified concisely within ITL and simulated with Tempura. But it also discusses some problems encountered during the specification and simulation, and indicates what should be added to solve those problems.
Mathematical simulation of self organizing chaotic processes in networks with speed independent processes by means of the asynchronous method of chaotic relaxations with delay using the Monte-Carlo method is considere...
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Mathematical simulation of self organizing chaotic processes in networks with speed independent processes by means of the asynchronous method of chaotic relaxations with delay using the Monte-Carlo method is considered. This method allows to imitate effectively the fulfilment of chaotic computing processes depending on the spread of time parameters of speed independent processors. Every speed independent processor is a nonsynchronous competing device in which the duration of the transient process is a random variable. In this work it is assumed that the random variable has normal distribution as far as the duration of work of the logical elements has namely such law of distribution. For computer simulation the Dirichlet problem was chosen for Laplace's equation, on a rectangular domain of R/sup 2/. Numerical calculations for solving this problem, comparing evaluations of errors and speed of convergence of computing processes arising in networks with speed independent processors are presented.
Discrete-event simulation is an important tool used for the performance evaluation of parallel systems. The space of tradeoffs is large however, when attempting to balance model fidelity and simulation execution tame....
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Discrete-event simulation is an important tool used for the performance evaluation of parallel systems. The space of tradeoffs is large however, when attempting to balance model fidelity and simulation execution tame. The paper describes a simulator-TAPS (Threaded Application parallel System Simulator)-that, in the context of threaded parallel computations, provides a spectrum of possibilities in this tradeoff space. TAPS is specifically designed to be parallelized; we discuss some crucial considerations regarding its parallelization.
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