This paper describes a database approach to parallel discrete event simulation. It employs a set of production rules to describe the behavior of active objects in a simulation system so that production rules can be me...
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This paper describes a database approach to parallel discrete event simulation. It employs a set of production rules to describe the behavior of active objects in a simulation system so that production rules can be merged and evaluated collectively in a rule network. To maintain correctness and exploit all possible parallelism, each token is time-stamped and can be processed asynchronously. An object relational database is employed to allow simulators located at different sites of an Intranet to communicate with each other. A dynamic, object-relational query tool is provided for the user to interact with the simulation system.
The problem of testing digital circuits is becoming much more difficult as these circuits increase in size and complexity. Thus, the development of parallel procedures for test pattern generation is currently a field ...
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The problem of testing digital circuits is becoming much more difficult as these circuits increase in size and complexity. Thus, the development of parallel procedures for test pattern generation is currently a field of important research activity. A new parallel procedure to determine the set of patterns to test a circuit is presented. It stems from a circuit partitioning scheme based on a mixed simulated annealing and tabu search technique which allows the load to be distributed among the processors in such a way that similar sized parts of the circuit are assigned to each processor while communications between processors are minimised. The method applied by each processor to obtain the test pattern uses an algorithm based on the Reed-Muller spectrum to determine the equation, thus being different from other procedures previously reported. The experimental results obtained by applying the procedure to the usual benchmark circuits in this field (ISCAS set) show good efficiencies which are maintained when the number of processors increases.
In the last years, since the early 80's, wormhole and virtual cut through routing modalities have replaced packet switching and circuit switching schemes. We give the theoretical bases to implement hole based (HB)...
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In the last years, since the early 80's, wormhole and virtual cut through routing modalities have replaced packet switching and circuit switching schemes. We give the theoretical bases to implement hole based (HB) routing algorithm (M. Coli and P. Palazzari, 1995) by using the virtual cut through modality. After reviewing the theory of HB routing, we demonstrate some theorems which allow us to use such a theory, developed for the packet switching case, also for the virtual cut through modality (HB-VCT routing algorithm). The main features of HB-VCT are its full adaptivity, the high fault tolerance capabilities and the low HW requirement. Furthermore, low latencies and high bandwidths are achievable because the use of virtual channels can be avoided. Some simulated results are presented in order to show the good traffic balance capabilities and the fault tolerant behavior of HB-VCT. simulation is also used to show the influence on throughput of traffic intensity and of a HB-VCT control parameter (the timeout).
A distributed, parallel implementation of the widely used Modular Semi-Automated Forces (ModSAF) distributed Interactive simulation (DIS) is presented, with scalable parallel processors (SPPs) used to simulate more th...
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A distributed, parallel implementation of the widely used Modular Semi-Automated Forces (ModSAF) distributed Interactive simulation (DIS) is presented, with scalable parallel processors (SPPs) used to simulate more than 50,000 individual vehicles. The single-SPP code is portable and has been used on a variety of different SPP architectures for simulations with up to 15,000 vehicles. A general metacomputing framework for DIS on multiple SPPs is discussed and results are presented for an initial system using explicit Gateway processes to manage communications among the SPPs. These 50K-vehicle simulations utilized 1,904 processors at six sites across seven time zones, including platforms from three manufacturers. Ongoing activities to both simplify and enhance the metacomputing system using Globus are described.
Even the more or less "canonical", lower-level architecture of information systems needs to be revisited from time to time. Notions like persistence and transactions belong traditionally to the area of datab...
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Even the more or less "canonical", lower-level architecture of information systems needs to be revisited from time to time. Notions like persistence and transactions belong traditionally to the area of database management systems. There are, however many applications, such as CAD, VLSI design or simulation, which need persistence and could take advantage of transactions, but require especially fast implementations not provided by DBMS. We describe a low-level transaction concept used to implement our parallel main memory object store (PPOST), to provide main memory access times combined with the safety and convenience of transactions.
Data staging is an important data management problem for a distributed heterogeneous networking environment, where each data storage location and intermediate node may have specific data available, storage limitations...
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Data staging is an important data management problem for a distributed heterogeneous networking environment, where each data storage location and intermediate node may have specific data available, storage limitations, and communication links. Sites in the network request data items and each item is associated with a specific deadline and priority. It is assumed that not all requests can be satisfied by their deadline. The work concentrates on solving a basic version of the data staging problem in which all parameter values for the communication system and the data request information represent the best known information collected so far and stay fixed throughout the scheduling process. A mathematical model for the basic data staging problem is introduced. Then, a multiple-source shortest-path algorithm based heuristic for finding a suboptimal schedule of the communication steps for data staging is presented. A simulation study is provided, which evaluates the performance of the proposed heuristic. The results show the advantages of the proposed heuristic over two random based scheduling techniques. This research, based on the simplified static model, serves as a necessary step toward solving the more realistic and complicated version of the data staging problem involving dynamic scheduling, fault tolerance, and determining where to stage data.
The proceedings contains 26 papers from the 11th workshop on parallel and distributedsimulation (PADS'97). Topics discussed include: conservative simulation;architecture and VLSI simulation;event simultaneity;VLS...
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The proceedings contains 26 papers from the 11th workshop on parallel and distributedsimulation (PADS'97). Topics discussed include: conservative simulation;architecture and VLSI simulation;event simultaneity;VLSI circuit partitioning;optimistic simulation;Petri net simulation;interconnection computer network;distributedsimulation;Hierarchical Tool HIT;Multi-Resolution Entity;bulk synchronous parallel models;and parallelsimulation environments.
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