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A randomized parallel 3D convex hull algorithm for coarse grained multicomputers 95

A randomized parallel 3D convex hull algorithm for coarse gr...

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proceedings of the seventh annual acm symposium on parallel algorithms and architectures

作者： Frank Dehne Xiaotie Deng Patrick Dymond Andreas Fabri Ashfaq A. Khokhar School of Computer Science Carleton University Ottawa Canada K1S Dept. of Computer Science York University North York Canada M3J 1P3 Dept. of Computer Science Utrecht University 3508 TB Utrecht The Netherlands School of EE and Dept. of Computer Sci. Purdue University West Lafayette IN

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Software pipelining loops with conditional branches 29

Software pipelining loops with conditional branches

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IEEE/acm International symposium on Microarchitecture (MICRO)

作者： M.G. Stoodley C.G. Lee Department of Electrical and Computer Engineering University of Toronto Toronto ONT Canada

ISBN: (纸本)9780818676413

Software pipelining is an aggressive scheduling technique that generates efficient code for loops and is particularly effective for VLIW architectures. Few software pipelining algorithms, however, are able to efficiently schedule loops that contain conditional branches. We have developed an algorithm we call All Paths Pipelining (APP) that addresses this shortcoming of software pipelining. APP is designed to achieve optimal or near-optimal performance for any run of iterations while providing efficient code for transitioning between runs. A run is the execution of consecutive iterations that all execute the same path through a loop. APP accomplishes this by using techniques from modulo scheduling and kernel recognition algorithms, the two main approaches for software pipelining loops. We have implemented the APP algorithm in our research compiler and have evaluated its performance by executing its generated code on a VLIW instruction-set simulator. For a processor with five heterogeneous functional units, APP is able to add another 1% to 23% increase in performance over basic software pipelining by effectively pipelining loops with conditional branches.

关键词： Pipeline processing VLIW Scheduling algorithm Processor scheduling Computer architecture Software algorithms Hardware parallel processing Kernel Microprocessors

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Reconciling simplicity and realism in parallel disk models 01

Reconciling simplicity and realism in parallel disk models

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proceedings of the twelfth annual acm-SIAM symposium on Discrete algorithms

作者： Peter Sanders Max Planck Institut für Informatik Saarbrücken Germany

ISBN: (纸本)9780898714906

For the design and analysis of algorithms that process huge data sets, a machine model is needed that handles parallel disks. There seems to be a dilemma between simple and flexible use of such a model and accurate modelling of details of the hardware. This paper explains how many aspects of this problem can be resolved. The programming model implements one large logical disk allowing concurrent access to arbitrary sets of variable size blocks. This model can be implemented efficienctly on multiple independent disks even if zones with different speed, communication bottlenecks and failed disks are allowed. These results not only provide useful algorithmic tools but also imply a theoretical justification for studying external memory algorithms using simple abstract *** algorithmic approach is random redundant placement of data and optimal scheduling of accesses. The analysis generalizes a previous analysis for simple abstract external memory models in several ways (Higher efficiency, variable block sizes, more detailed disk model). As a side effect, an apparently new Chernoff bound for sums of weighted 0-1 random variables is derived.

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parallel processor scheduling with delay constraints 01

Parallel processor scheduling with delay constraints

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proceedings of the twelfth annual acm-SIAM symposium on Discrete algorithms

作者： Daniel W. Engels Jon Feldman David R. Karger Matthias Ruhl MIT Laboratory for Computer Science Cambridge MA

ISBN: (纸本)9780898714906

We consider the problem of scheduling unit-length jobs on identical parallel machines such that the makespan of the resulting schedule is minimized. Precedence constraints impose a partial order on the jobs, and both communication and precedence delays impose relative timing constraints on dependent jobs. The combination of these two types of timing constraints naturally models the instruction scheduling problem that occurs during software compilation for state-of-the-art VLIW (Very Long Instruction Word) processors and multiprocessor parallel *** present the first known polynomial-time algorithm for the case where the precedence constraint graph is a forest of in-trees (or a forest of out-trees), the number of machines m is fixed, and the delays (which are a function of both the job pair and the machines on which they run) are bounded by a constant *** algorithm relies on a new structural theorem for scheduling jobs with arbitrary precedence constraints. Given an instance with many independent dags, the theorem shows how to convert, in linear time, a schedule S for only the largest dags into a complete schedule that is either optimal or has the same makespan as S.

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parallel dynamic programming for solving the string editing problem on a CGM/BSP 02

Parallel dynamic programming for solving the string editing ...

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proceedings of the fourteenth annual acm symposium on parallel algorithms and architectures

作者： C. E. R. Alves E. N. Cáceres F. Dehne FTCE - Universidade São São Paulo Brazil Universidade Federal de Mato Campo Grande Brazil Carleton University Ottawa Canada

ISBN: (纸本)9781581135299

In this paper we present a coarse-grained parallel algorithm for solving the string edit distance problem for a string A and all substrings of a string C. Our method is based on a novel CGM/BSP parallel dynamic programming technique for computing all highest scoring paths in a weighted grid graph. The algorithm requires \log p rounds/supersteps and O(\fracn^2p\log m) local computation, where $p$ is the number of processors, p^2 \leq m \leq n. To our knowledge, this is the first efficient CGM/BSP algorithm for the alignment of all substrings of C with A. Furthermore, the CGM/BSP parallel dynamic programming technique presented is of interest in its own right and we expect it to lead to other parallel dynamic programming methods for the CGM/BSP.

关键词： BSP string editing parallel algorithms dynamic programming CGM

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Locality-Aware Task Management for Unstructured parallelism: A Quantitative Limit Study 13

Locality-Aware Task Management for Unstructured Parallelism:...

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annual acm symposium on parallel algorithms and architectures

作者： Richard M. Yoo Christopher J. Hughes Changkyu Kim Yen-Kuang Chen Christos Kozyrakis Parallel Computing Laboratory Intel Labs Santa Clara CA 95054 Pervasive Parallelism Laboratory Stanford University Stanford CA 94305

ISBN: (纸本)9781450315722

As we increase the number of cores on a processor die, the on-chip cache hierarchies that support these cores are getting larger, deeper, and more complex. As a result, non-uniform memory access effects are now prevalent even on a single chip. To reduce execution time and energy consumption, data access locality should be exploited. This is especially important for task-based programming systems, where a scheduler decides when and where on the chip the code segments, i.e., tasks, should execute. Capturing locality for structured task parallelism has been done effectively, but the more difficult case, unstructured parallelism, remains largely unsolved-little quantitative analysis exists to demonstrate the potential of locality-aware scheduling, and to guide future scheduler implementations in the most fruitful direction. This paper quantifies the potential of locality-aware scheduling for unstructured parallelism on three different many-core processors. Our simulation results of 32-core systems show that locality-aware scheduling can bring up to 2.39x speedup over a randomized schedule, and 2.05x speedup over a state-of-the-art baseline scheduling scheme. At the same time, a locality-aware schedule reduces average energy consumption by 55% and 47%, relative to the random and the baseline schedule, respectively. In addition, our 1024-core simulation results project that these benefits will only increase: Compared to 32-core executions, we see up to 1.83x additional locality benefits. To capture such potentials in a practical setting, we also perform a detailed scheduler design space exploration to quantify the impact of different scheduling decisions. We also highlight the importance of locality-aware stealing, and demonstrate that a stealing scheme can exploit significant locality while performing load balancing. Over randomized stealing, our proposed scheme shows up to 2.0x speedup for stolen tasks.

关键词： Task Scheduling Task Stealing Locality Performance Energy

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Truly parallel burrows-wheeler compression and decompression 13

Truly parallel burrows-wheeler compression and decompression

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proceedings of the twenty-fifth annual acm symposium on parallelism in algorithms and architectures

作者： James Alexander Edwards Uzi Vishkin University of Maryland College Park USA

ISBN: (纸本)9781450315722

We present novel work-optimal PRAM algorithms for Burrows-Wheeler (BW) compression and decompression of strings over a constant alphabet. For a string of length n, the depth of the compression algorithm is O(log2 n), and the depth of the corresponding decompression algorithm is O(log n). These appear to be the first polylogarithmic-time work-optimal parallel algorithms for any standard lossless compression *** algorithms for the individual stages of compression and decompression may also be of independent interest: 1. a novel O(log n)-time, O(n)-work PRAM algorithm for Huffman decoding; 2. original insights into the stages of the BW compression and decompression problems, bringing out parallelism that was not readily apparent. We then mapped such parallelism in interesting ways to elementary parallel routines that have O(log n)-time, O(n)-work solutions, such as: (i) prefix-sums problems with an appropriately-defined associative binary operator for several stages, and (ii) list ranking for the final stage of decompression (inverse blocksorting transform).Companion work reports empirical speedups of up to 25x for compression and up to 13x for decompression. This reflects a speedup of 70x over recent work on BW compression on GPUs.

关键词： burrows-wheeler lossless compression parallel pram

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Optimal prefetching and caching for parallel I/O sytems 01

Optimal prefetching and caching for parallel I/O sytems

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proceedings of the thirteenth annual acm symposium on parallel algorithms and architectures

作者： Mahesh Kallahalla Peter J. Varman Hewlett-Packard Labs 1501 Page Mill Rd. Palo Alto CA Department of ECE Rice University Houston TX

ISBN: (纸本)9781581134094

We address the problem of prefetching and caching in a parallel I/O system and present a new algorithm for optimal parallel-disk scheduling. Traditional buffer management algorithms that minimize the number of I/O disk accesses, are substantially suboptimal in a parallel I/O system where multiple I/Os can proceed *** present a new algorithm SUPERVISOR for parallel-disk I/O scheduling. We show that in the off-line case, where apriori knowledge of all the requests is available, SUPERVISOR performs the minimum number of I/Os to service the given I/O requests. This is the first parallel I/O scheduling algorithm that is provably offline optimal. In the on-line case, we study SUPERVISOR in the context of global L-block lookahead, which gives the buffer management algorithm a lookahead consisting of L distinct requests. We show that the competitive ratio of SUPERVISOR, with global L-block lookahead, is Θ(M - L + D), when L ≤ M, and Θ(MD/L), when L > M, where the number of disks is D and buffer size is M.

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Infinite parallel job allocation (extended abstract) 00

Infinite parallel job allocation (extended abstract)

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proceedings of the twelfth annual acm symposium on parallel algorithms and architectures

作者： Petra Berenbrink Artur Czumaj Tom Friedetzky Nikita D. Vvedenskaya Dept. of Mathematics & Computer Science Paderborn University D-33095 Paderborn Germany Department of Computer and Information Science New Jersey Institute of Technology University Heights Newark NJ Institut für Informatik Technische Universität München D-80290 München Germany Institute of Information Transmission Problems Russian Academy of Science Moscow 101447 Russia

ISBN: (纸本)9781581131857

In recent years, the task of allocating jobs to servers has been studied with the “balls and bins” abstraction. Results in this area exploit the large decrease in maximum load that can be achieved by allowing each job (ball) a little freedom in choosing its destination server (bin).In this paper we examine an infinite and parallel allocation process (see [ABS98]) which is related to the “balls and bins” abstraction. The simple process can be used to model many problems arising in applications like load balancing, data accesses for parallel data servers, hashing, and PRAM ***, the parallel allocation process behaves in a highly non-uniform manner which makes its analysis challenging. Even the typically simple question of for which arrival rates the process is stable, is highly non-trivial. In order to cope with this non-uniform behavior we introduce a new sequential process and show (via simulations) that the sequential process models the behavior of the parallel one very accurately. We develop a system of ordinary differential equations in order to describe the behavior of our sequential process and present a thorough analysis of the performance this process. For example, we show that the queue length distribution decreases double-exponentially. Finally, we present simulation results indicating that the solutions to the differential equations very well predict the queue length distribution of our sequential process and the largest injection rate for which it is ***, we can conclude that in all the performance characteristics we have measured experimentally, the parallel and the sequential process are closely related. This indicates that the obtained solution of the differential equations and the results presented above are applicable to the parallel process, too.

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Generalized multiprocessor scheduling for directed acyclic graphs

Generalized multiprocessor scheduling for directed acyclic g...

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Supercomputing Conference

作者： G.N. Srinivasa Prasanna B.R. Musicus AT and T Bell Laboratories Inc. Murray Hill NJ USA Bolt Beranek and Newman 슠Inc. Cambridge MA USA

In the 3rd annual acm symposium on parallel algorithms and architectures, pp. 216-228 (JuIy 1991), we presented several new results in the theory of homogeneous multiprocessor scheduling. A directed acyclic graph (DAG) of tasks was to be scheduled. Tasks were assumed to be parallelizable-as more processors are applied to a task, the time taken to compute it decreases, yielding some speedup. Because of communication, synchronization and task scheduling overheads, this speedup increases less than linearly with the number of processors applied. The optimal scheduling problem is to determine the number of processors assigned to each task, and to the task sequencing, to minimise the finishing time. Using optimal control theory, in the special case where the speedup function of each task is p/sup /spl alpha// (where p is the amount of processing power applied to the task), a closed form solution for task graphs formed from parallel and series connections was derived. This paper considerably extends these techniques for arbitrary DAGs and applies them to matrix arithmetic compilation. The optimality conditions impose nonlinear constraints on the flow of processing power from predecessors to successors, and on the finishing times of siblings. This paper presents a fast algorithm for determining and solving these nonlinear equations. The algorithm utilizes the structure of the finishing time equations to efficiently run a conjugate gradient minimization leading to the optimal solution. The algorithm has been tested on a variety of DAGs. The results presented show that it is superior to alternative heuristic approaches.< >

关键词： Processor scheduling Optimal scheduling Finishing Nonlinear equations parallel algorithms Computer architecture Concurrent computing Optimal control Closed-form solution Arithmetic

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