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检索条件"任意字段=Reconfigurable Technology: FPGAs and Reconfigurable Processors Computing and Communications IV"
41 条 记 录,以下是21-30 订阅
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Framework for development and distribution of hardware acceleration
Framework for development and distribution of hardware accel...
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Conference on reconfigurable technology - fpgas and reconfigurable processors for computing and communications iv
作者: Thomas, DB Luk, W Univ London Imperial Coll Sci Technol & Med Dept Comp London SW7 2BZ England
This paper describes IGOL, a framework for developing reconfigurable data processing applications. While IGOL was originally designed to target imaging and graphics systems, its structure is sufficiently general to su... 详细信息
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A reconfigurable platform for development of embedded systems
A reconfigurable platform for development of embedded system...
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Conference on reconfigurable technology - fpgas and reconfigurable processors for computing and communications iv
作者: Yang, MJ Yan, YX Wang, QG Agency for Science Technology and Research (Singapore) National Univ. of Singapore (Singapore)
Quality, functionality and time-to-market are key indices for a competitive and successful embedded system product. A good way to reduce the time to market is to make use of reusable software models and reconfigurable... 详细信息
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Defect-tolerant, fine-grained parallel testing of a Cell Matrix
Defect-tolerant, fine-grained parallel testing of a Cell Mat...
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Conference on reconfigurable technology - fpgas and reconfigurable processors for computing and communications iv
作者: Durbeck, LJK Macias, NJ Cell Matrix Corp. (United States)
A fault testing methodology for a cell-based self configurable hardware platform (the Cell Matrix) is described. Background on the Cell Matrix is given, including its amenability to use despite the presence of manufac... 详细信息
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Minimizing energy dissipation of matrix multi-plication kernel on Virtex-II
Minimizing energy dissipation of matrix multi-plication kern...
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Conference on reconfigurable technology - fpgas and reconfigurable processors for computing and communications iv
作者: Choi, S Prasanna, VK Jang, JW Univ So Calif Los Angeles CA 90089 USA
In this paper, we develop energy-efficient designs for matrix multiplication on fpgas. To analyze the energy dissipation, we develop a high-level model using domain-specific modeling techniques. In this model, we iden... 详细信息
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Proceedings of SPIE: reconfigurable technology: fpgas and reconfigurable processors for computing and communications III
Proceedings of SPIE: Reconfigurable Technology: FPGAs and Re...
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reconfigurable technology: fpgas and reconfigurable processors for computing and communications III
This Volume 4525 of the conference proceedings contains 18 papers. Topics discussed include field programmable gate arrays, reconfigurable computers, algorithms, filters, network processors and flexible buffer managem... 详细信息
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reconfigurable technology: fpgas and reconfigurable processors for computing and communications III
Reconfigurable Technology: FPGAs and Reconfigurable Processo...
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2001年
作者: Peter Mark Athanas John Schewel John T McHenry Philip B James-Roxby
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reconfigurable processors for handhelds and wearables:: Application analysis
Reconfigurable processors for handhelds and wearables:: Appl...
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Conference on reconfigurable technology - fpgas and reconfigurable processors for computing and communications III
作者: Enzler, R Platzner, M Plessl, C Thiele, L Tröster, G Swiss Fed Inst Technol Swiss Fed Inst Technol CH-8092 Zurich Switzerland
In this paper, we present the analysis of applications from the domain of handheld and wearable computing. This analysis is the first step to derive and evaluate design parameters for dynamically reconfigurable proces... 详细信息
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Variable length decoder on dynamically reconfigurable cell array processor
Variable length decoder on dynamically reconfigurable cell a...
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Conference on reconfigurable technology - fpgas and reconfigurable processors for computing and communications III
作者: Komoku, K Morishita, T Hatano, F Teramoto, I Okayama Prefectural Univ Fac Comp Sci & Syst Engn Soja Okayama 7191197 Japan
Three kinds of basic Variable Length Decoder were implemented on Dynamically reconfigurable Cell Array Processor. Traditional method, Leading zeros method, Generated unique address method were discussed. The number of... 详细信息
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A run-time reconfigurable 2D discrete wavelet transform using JBits
A run-time reconfigurable 2D discrete wavelet transform usin...
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Conference on reconfigurable technology - fpgas and reconfigurable processors for computing and communications III
作者: Ballagh, J Athanas, P Keller, E Virginia Tech Blacksburg VA 24061 USA
With the growth in high performance multimedia applications, specialized hardware for certain tasks is desirable. While ASICs provide a solution addressing performance, they are unable to provide an optimal solution f... 详细信息
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Configuration subsystem design exploration for domain-specific reconfigurable technologies
Configuration subsystem design exploration for domain-specif...
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Conference on reconfigurable technology - fpgas and reconfigurable processors for computing and communications III
作者: Vasilko, M Bournemouth Univ Sch Design Engn & Comp Microelect Syst Res Grp Poole BH12 5BB Dorset England
This paper presents an example of using a reconfigurable systems CAD tool (DYNASTY Framework) for the design exploration of various configuration subsystems in a specific reconfigurable technology. Given a set of appl... 详细信息
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