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检索条件"任意字段=Seventh International Symposium on Parallel Architectures, Algorithms and Programming"

共 511 条记录，以下是111-120 订阅

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A test sequence selection method for parallel software systems

A test sequence selection method for parallel software syste...

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2011 4th international symposium on parallel architectures, algorithms and programming, PAAP 2011

作者： Sun, Tao Ye, Xinming Liu, Jing College of Computer Science Inner Mongolia University Hohhot China

ISBN: (纸本)9780769545752

Modeling and testing for a parallel software system is very difficult, because parallel behaviors leads to system state explosion. Many testing methods are testing with a large number of redundancies. In this paper, a test sequence selection method for parallel software systems is shown. The method is based on linear behavior sequences which is preparing for testing, called LBSPT. Firstly, a formal model for software system specification is constructed based on Coloured Petri Net (CPN), called system model, and LBSPT is also modeled based on CPN, called LBSPT model. A test sequence selection method is defined on these models. The method could select all of test sequences related to LBSPT, and does not contain any redundancy. The state explode problem in software testing is solved to a certain extent. Practices show that the effect of this method is better than other methods such as random walk. © 2011 IEEE.

关键词： Redundancy

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On the Performance of parallel Neural Network Implementations on Distributed Memory architectures 08

On the Performance of Parallel Neural Network Implementation...

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8th IEEE international symposium on Cluster Computing and the Grid

作者： Ganeshamoorthy, K. Ranasinghe, D. N. Univ Colombo Sch Comp Dept Computat & Intelligent Syst Colombo 07 Sri Lanka

ISBN: (纸本)9781424442379

In this paper, we study the impact of multi processor memory systems in particular, the distributed memory (I)M) and virtual shared memory (VSM), on the implementation of parallel backpropagation neural network algorithms. In the first instance, neural network is partitioned into sub neural networks by applying a hybrid partitioning scheme. In the second, each partitioned network is evaluated with matrix multiplication. Three different sizes of neural networks are used and exchange rate prediction used as a reference problem. parallel implementations for each of the distributed memory and virtual shared memory scenarios is obtained. These algorithms are implemented on a high performance cluster, "Monolith" consisting of over 396 nodes. programming is realized using Message Passing Interface (MPI) library and C-Linda. The partitioned, matrix multiplication has the fastest execution time, and DM/MPI implementation is always faster than the VSM/Linda equivalent. However in VSM/Linda it is possible to allow the parallel neural network to choose the optimum number of processors dynamically.

关键词： VSM DM Hybrid partition parallel neural network

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A parallel PCG solver for large-scale groundwater flow simulation based on OpenMP

A parallel PCG solver for large-scale groundwater flow simul...

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2011 4th international symposium on parallel architectures, algorithms and programming, PAAP 2011

作者： Li, Dandan Ji, Xiaohui Wang, Qun Beijing China

ISBN: (纸本)9780769545752

Groundwater flow simulation has become one of the top international issues in new generation of environmental applications. When managing large-scale groundwater flow problems, the intensive computational ability and large amounts of memory space required for modeling are the main bottlenecks for researchers. In order to solve three-dimensional large-scale groundwater flow problems more rapidly, the OpenMP was adopted to parallelize the preconditioned conjugate gradient (PCG) algorithm in this paper. And this paper carried out a numerical experiment of the three-dimensional groundwater flow model on a computer with four cores. Based on the numerical experiment, it is found that the execution time of the original serial PCG program is about 1.74 to 2.86 times of the parallel PCG program executed with different number of threads. The experimental results also demonstrate that the PCG solver based on OpenMP is an effective way for solving large-scale three-dimensional groundwater flow problem. © 2011 IEEE.

关键词： Groundwater flow

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A CMOS architecture allowing parallel DNA comparison for on-chip assembly

A CMOS architecture allowing parallel DNA comparison for on-...

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IEEE international symposium on Circuits and Systems

作者： Hu, Yuanqi Liu, Yan Toumazou, Christofer Georgiou, Pantelis Univ London Imperial Coll Sci Technol & Med Dept Elect & Elect Engn Ctr Bioinspired Technol Inst Biomed Engn London SW7 2AZ England

ISBN: (纸本)9781467302197

This paper introduces a CMOS based system that has been designed to allow parallel comparison of fragmented DNA sequences for on-chip assembly. The compatibility of different existing PC-based algorithms for implementation in CMOS is compared and the overlaplayout-consensus approach is found to be the most suitable one. The designed system comprises a scalable processing array capable of parallel computation, which allows identification of overlaps in DNA fragments in addition to error tolerance through dynamic programming. Analysis shows that there is a "pixel area vs computation time" trade-off when implementing such a parallel architecture. Results from a hypothetical assembly confirm good overlap detection and error tolerance, with up to 94% similarity in the detected overlaps, when the error is as much as 10%.

关键词： parallel architectures

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The design and implementation of OMPit: An OpenMP compiler characterized by logs for parallel and work-sharing

The design and implementation of OMPit: An OpenMP compiler c...

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2011 4th international symposium on parallel architectures, algorithms and programming, PAAP 2011

作者： Luo, Qiuming Cai, Ye Liu, Chengjian Kong, Chang College of Computer Science and Software Engineering Shenzhen University China

ISBN: (纸本)9780769545752

There are many tools for OpenMP benchmarking which measure the various aspects of the performance, such as the overheads of OpenMP directives and the characteristics of the whole system. But we lack some tools to show us the work-sharing details when the OpenMP program finished running. The OMPit (OMPi for tutoring) is designed to provide the work-sharing information during the running, which can be used for tutoring and might help debugging or tuning. The work-sharing logging includes the work assignment and the timestamps for three different work-sharing behaviors. The logging information can be output as a text files or visualized figures. The designing of OMPit is provided and the details of how to inserting the logging code into the OMPi compiler is discussed too. © 2011 IEEE.

关键词： Benchmarking

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programming, ANALYSIS AND SYNTHESIS OF parallel SIGNAL PROCESSORS.

PROGRAMMING, ANALYSIS AND SYNTHESIS OF PARALLEL SIGNAL PROCE...

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1987 IEEE international symposium on Circuits and Systems.

作者： Thaler, M. Loeffler, Ch Moschytz, G.S. ETH Zurich Switz ETH Zurich Switz

A method for the programming and evaluation of parallel signal-processor architectures based on a data-flow representation of signal-processing algorithms is described. The constant data flow, which is a special property of most signal-processing algorithms, allows the scheduling and resource allocation to be done at compile time, rather than at run time as in usual data-flow systems. It is therefore possible to describe arbitrary hardware configurations;a result that is closer to a realizable hardware solution is guaranteed. Therefore hardware requirements can be kept low. 7 refs.

关键词： SIGNAL PROCESSING

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A case study of SWIM: Optimization of memory intensive application on GPGPU

A case study of SWIM: Optimization of memory intensive appli...

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international symposium on parallel architectures, algorithms, and programming

作者： Yi, Wei Tang, Yuhua Wang, Guibin Fang, Xudong National Laboratory for Parallel and Distributed Processing School of Computer National University of Defense Technology Changsha China

ISBN: (纸本)9780769543123

Recently, GPGPU has been adopted well in the High Performance Computing (HPC) field. The limited global memory bandwidth poses a great challenge to many GPGPU programmers trying to exploit parallelism within the CPUGPU heterogeneous platform. In this paper, we choose SWIM, a typical memory intensive application from the SPEC OMP 2001 benchmark suite, for case study. We attempt to optimize the performance and energy consumption of the application utilizing different memory access mechanisms and present optimization methods including matrix transposition and kernel fusion. The experimental results on the Intel CoreTM i920 CPU plus GeForce GTX 295 platform shows that, the proposed optimizing methods achieve a speedup of 8.7X over the original OpenMP program and reduce the energy consumption by 83% for the problem size of 2048*2048. © 2010 IEEE.

关键词： Energy utilization

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An Architecture-Independent CGRA Compiler enabling OpenMP Applications 36

An Architecture-Independent CGRA Compiler enabling OpenMP Ap...

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36th IEEE international parallel and Distributed Processing symposium (IEEE IPDPS)

作者： Kojima, Takuya Adhi, Boma Cortes, Carlos Tan, Yiyu Sano, Kentaro Univ Tokyo Grad Sch Informat Sci & Technol Tokyo Japan RIKEN Ctr Computat Sci R CCS Kobe Hyogo Japan

ISBN: (纸本)9781665497473

Coarse-Grained reconfigurable architecture (CGRA) is a promising platform for HPC systems in the post-Moore's era. A single-source programming model is essential for practical heterogeneous computing. However, we do not have a canonical programming model and a frontend compiler for it. Existing versatile CGRAs, in respect to their execution model, computational capability, and system structure, magnify the difficulty of orchestrating the compiler techniques. It consequently forces designers of the CGRAs to develop the compiler from scratch, working only for their architectures. Such an approach is outdated, given other successful accelerators like GPU and FPGAs. This paper presents a new CGRA compiler framework in order to reduce development efforts of CGRA applications. OpenMP annotated codes are fed into the proposed compiler, as recent OpenMP support device offloading to the accelerators. This property improves the reusability of the existing source code for HPC workloads. The design of the compiler is inspired by LLVM, which is the most famous compiler framework so that the frontend is built to be architecture-independent. In this work, we demonstrate that the proposed compiler can handle different types of CGRAs without changing the source codes. In addition, we discuss the effect of architecture-independent optimization algorithms. We also provide an open-source implementation of the compiler framework at https://***/hal-lab-u-tokyo/CGRAOmp.

关键词： Codes Runtime Computational modeling Graphics processing units programming Heterogeneous networks Reconfigurable architectures

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parallel execution of multi-set constraint rewrite rules 08

Parallel execution of multi-set constraint rewrite rules

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PPDP 2008: 10th international ACM SIGPLAN symposium on Principles and Practice of Declarative programming

作者： Sulzmann, Martin Lam, Edmund S. L. Programming Logics and Semantics Group IT University of Copenhagen Rued Langgaards Vej 7 2300 Copenhagen S Denmark School of Computing National University of Singapore S16 Level 5 3 Science Drive 2 Singapore 117543 Singapore

ISBN: (纸本)9781605581170

Multi-set constraint rewriting allows for a highly parallel computational model and has been used in a multitude of application domains such as constraint solving, agent specification etc. Rewriting steps can be applied simultaneously as long as they do not interfere with each other. We wish that the underlying constraint rewrite implementation executes rewrite steps in parallel on increasingly popular becoming multi-core architectures. We design and implement efficient algorithms which allow for the parallel execution of multi-set constraint rewrite rules. Our experiments show that we obtain some significant speed-ups on multi-core architectures. Copyright © 2008 ACM.

关键词： Computer architecture

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High-performance Energy-efficient Recursive Dynamic programming with Matrix-multiplication-like Flexible Kernels 29

High-performance Energy-efficient Recursive Dynamic Programm...

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29th IEEE international parallel and Distributed Processing symposium (IPDPS)

作者： Tithi, Jesmin Jahan Ganapathi, Pramod Talati, Aakrati Aggarwal, Sonal Chowdhury, Rezaul SUNY Stony Brook Dept Comp Sci Stony Brook NY 11790 USA

ISBN: (纸本)9781479986484

Dynamic programming (DP) problems arise in a wide range of application areas spanning from logistics to computational biology. In this paper, we show how to obtain high-performing parallel implementations for a class of DP problems by reducing them to highly optimizable flexible kernels through cache-oblivious recursive divide-and-conquer (CORDAC). We implement parallel CORDAC algorithms for four non-trivial DP problems, namely the parenthesization problem, Floyd-Warshall's all-pairs shortest path (FW-APSP), sequence alignment with general gap penalty (gap problem) and protein accordion folding. To the best of our knowledge our algorithms for protein accordion folding and the gap problem are novel. All four algorithms have asymptotically optimal cache performance, and all but FW-APSP have asymptotically more parallelism than their looping counterparts. We show that the base cases of our CORDAC algorithms are predominantly matrix-multiplication-like (MM-like) flexible kernels that expose many optimization opportunities not offered by traditional looping DP codes. As a result, one can obtain highly efficient DP implementations by optimizing those flexible kernels only. Our implementations achieve 5 - 150x speedup over their standard loop based DP counterparts while consuming order-of-magnitude less energy on modern multicore machines with 16 - 32 cores. We also compare our implementations with parallel tiled codes generated by existing polyhedral compilers: Polly, PoCC and PLuTo, and show that our implementations run significantly faster. Finally, we present results on manycores (Intel Xeon Phi) and clusters of multicores obtained using simple extensions for SIMD and shared-distributed-shared-memory architectures, respectively, demonstrating the versatility of our approach. Our optimization approach is highly systematic and suitable for automation.

关键词： cache-oblivious recursive divide-and-conquer flexible kernel polyhedral compiler dynamic programming

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