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共 513 条记录，以下是151-160 订阅

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Improvement of Workload Balancing Using parallel Loop Self-Scheduling on Xeon Phi

Improvement of Workload Balancing Using Parallel Loop Self-S...

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international symposium on parallel architectures, algorithms and programming (PAAP)

作者： Chao-Wei Huang Chan-Fu Kuo Chao-Tung Yang Jung-Chun Liu Shuo-Tsung Chen Department of Computer Science Tunghai University Taichung City Taiwan ROC

In this paper, we will examine how to improve workload balancing on a computing cluster by a parallel loop self-scheduling scheme. We use hybrid MPI and OpenMP parallel programming in C language. The block partition loop is according to the performance weighting of compute nodes. This study implements parallel loop self-scheduling use Xeon Phi, with its characteristics to improve workload balancing between heterogeneous nodes. The parallel loop self-scheduling is composed of the static and dynamic allocation. A weighting algorithm is adopted in the static part while the well-known loop self-scheduling scheme is adopted in the dynamic part. In recent years, Intel promotes its new product Xeon Phi coprocessor, which is similar to the x86 architecture coprocessor. It has about 60 cores and can be regarded as a single computing node, with the computing power that cannot be ignored. In our experiment, we will use a plurality of computing nodes. We compute four applications, i.e., Matrix multiplication, sparse matrix multiplication, Mandelbrot set computation, and the circuit satisfiability problem. Our results will show how to do the weight allocation and how to choose a scheduling scheme to achieve the best performance in the parallel loop self-scheduling.

关键词： Dynamic scheduling Processor scheduling Sparse matrices Heuristic algorithms Computers Graphics processing units

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Proceedings - IEEE 14th international symposium on parallel and Distributed Computing, ISPDC 2015

Proceedings - IEEE 14th International Symposium on Parallel ...

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14th IEEE international symposium on parallel and Distributed Computing, ISPDC 2015

ISBN: (纸本)9781467371483

The proceedings contain 26 papers. The topics discussed include: getting ready for approximate computing: trading parallelism for accuracy for DSS workloads;dataClay: the integration of persistent data, parallel programming models, and true sharing;Intel architecture and technology for future HPC system building blocks;personalized motion sensor driven gesture recognition in the FIWARE cloud platform;a simulator for analysis of opportunistic routing algorithms;multilevel task parallelism exploitation on asymmetric sets of tasks and when using third-party tools;cache affinity optimization techniques for scaling software transactional memory systems on multi-CMP architectures;high-speed security analytics powered by in-memory machine learning engine;GPU-accelerated digital halftoning by the local exhaustive search;analyzing memory access on CPU-GPGPU shared LLC architecture;and schedule dynamic multiple parallel jobs with precedence-constrained tasks on heterogeneous distributed computing systems.

关键词： Memory architecture

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A Data-oriented Method for Scheduling Dependent Tasks on High-density Multi-GPU Systems 17

A Data-oriented Method for Scheduling Dependent Tasks on Hig...

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2015 IEEE 17th international Conference on High Performance Computing and Communications (HPCC)

作者： Zhang, Peng Gao, Yuxiang Qiu, Meikang SUNY Stony Brook Dept Biomed Engn Stony Brook NY 11794 USA Cray Inc Cluster Solut Dept San Jose CA USA Pace Univ Dept Comp Sci New York NY 10038 USA

ISBN: (纸本)9781479989379

The rapidly-changing computer architectures, though improving the performance of computers, have been challenging the programming environments for efficiently harnessing the potential of novel architectures. In this area, though the high-density multi-GPU architecture enabled unparalleled performance advantage of dense GPUs in a single server, it has increased the difficulty for scheduling diversified and dependent tasks. We therefore propose a data-oriented method for scheduling dependent tasks for this architecture while providing its implementation. In our method, we model a parallel program as a collection of data-dependent tasks for which data dependencies are managed by an expressive matrix. Accordingly, we develop a hierarchical scheduler infrastructure for our model. In this, a top scheduler is built for querying the data-dependency matrix;three downstream schedulers for queuing computation tasks that are exclusively assigned to processor, accelerator or either;and a multitude of bottom schedulers each for providing a processing element with assigned tasks. We experiment our scheduler for examples of Strassen matrix multiplication and Cholesky matrix inversion algorithms on a computer that has 8 Tesla K40 GPUs. The results show that our method is capable of offering the efficient task parallelism while fulfilling the complex task dependencies. When advanced task-oriented schedulers have been widely designed for distributed systems, a lightweight data-driven scheduler could be an alternative and handy approach that can handle the dependent yet diversified tasks of data-intensive applications for the novel high-density multi-accelerator system.

关键词： data scheduling task scheduling parallel computing heterogeneous multi-GPU systems

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High-Performance Graph Analytics on Manycore Processors

High-Performance Graph Analytics on Manycore Processors

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international symposium on parallel and Distributed Processing (IPDPS)

作者： George M. Slota Sivasankaran Rajamanickam Kamesh Madduri Computer Science and Engineering The Pennsylvania State University University Park PA Scalable Algorithms Department Sandia National Laboratories Albuquerque NM

The divergence in the computer architecture landscape has resulted in different architectures being considered mainstream at the same time. For application and algorithm developers, a dilemma arises when one must focus on using underlying architectural features to extract the best performance on each of these architectures, while writing portable code at the same time. We focus on this problem with graph analytics as our target application domain. In this paper, we present an abstraction-based methodology for performance-portable graph algorithm design on manicure architectures. We demonstrate our approach by systematically optimizing algorithms for the problems of breadth-first search, color propagation, and strongly connected components. We use Kokkos, a manicure library and programming model, for prototyping our algorithms. Our portable implementation of the strongly connected components algorithm on the NVIDIA Tesla K40M is up to 3.25× faster than a state-of-the-art parallel CPU implementation on a dual-socket Sandy Bridge compute node.

关键词： Instruction sets Silicon Optimization Synchronization Color Arrays parallel processing

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Next Generation Cloud Computing Reliability:Issues and Challenges

Next Generation Cloud Computing Reliability:Issues and Chall...

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The 7th international symposium on parallel architectures, algorithms and programming, PAAP2015(2015年第七届国际并行体系结构,算法和编程研讨会)

作者： Jemal Abawajy Parallel and Distributed Computing Lab School of Information Technology Deakin University Australia

Introduction Cloud computing is widely recognized for its cost savings,scaling and for accelerating business innovation.

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parallel algorithms for Testing Length Four Permutations 6

Parallel Algorithms for Testing Length Four Permutations

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6th international symposium on parallel architectures, algorithms, and programming (PAAP)

作者： Han, Yijie Saxena, Sanjeev Univ Missouri Sch Comp & Engn Kansas City MO 64110 USA Indian Inst Technol Dept Comp Sci & Engn Kanpur 208016 Uttar Pradesh India

ISBN: (纸本)9781479938445

We present new parallel algorithms for testing pattern involvement for all length 4 permutations. Our algorithms have the complexity of O(log n) time with n/log n processors on the CREW PRAM model, O(log log log n) time with n/log log log n processors or constant time and n log 3 n processors on a CRCW PRAM model. parallel algorithms were not designed before for some of these patterns and for other patters the previous best algorithms require O(log n) time and n processors on the CREW PRAM model.

关键词： Separable permutations length 4 permutations pattern matching parallel algorithms

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High-Performance Energy-Efficient Recursive Dynamic programming with Matrix-Multiplication-Like Flexible Kernels

High-Performance Energy-Efficient Recursive Dynamic Programm...

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international symposium on parallel and Distributed Processing (IPDPS)

作者： Jesmin Jahan Tithi Pramod Ganapathi Aakrati Talati Sonal Aggarwal Rezaul Chowdhury Department of Computer Science Stony Brook University New York USA

Dynamic programming (DP) problems arise in wide range of application areas spanning from logistics to computational biology. In this paper, we show how to obtain high-performing parallel implementations for a class of Problems by reducing them to highly utilizable flexible kernels through cache-oblivious recursive divide- and-conquer(CORDAC). We implement parallel CORDAC algorithms for four non-trivial DP problems, namely the parenthesization problem, Floyd-Warshall's all-pairs shortest path (FW-APSP), sequence alignment with general gap penalty (gap problem)and protein accordion folding. To the best of our knowledge our algorithms for protein accordion folding and the gap problem are novel. All four algorithms have asymptotically optimal cache performance, and all but FW-APSP have asymptotically more parallelism than their looping counterparts. We show that the base cases of our CORDAC algorithms are predominantly matrix-multiplication-like (MM-like) flexible kernels that expose many optimization opportunities not offered by traditional looping DP codes. As a result, one can obtain highly efficient DP implementations by optimizing those flexible kernels only. Our implementations achieve 5 -- 150× speedup over their standard loop based DP counterparts while consuming order-of-magnitude less energy on modern multicore machines with 16 -- 32 cores. We also compareour implementations with parallel tiled codes generated by existing polyhedral compilers: Polly, PoCC and PLuTo, and show that our implementations run significantly faster. Finally, we present results on manicures (Intel Xeon Phi) and clusters of multicores obtained using simple extensions for SIMD and shared-distributed-shared-memory architectures, respectively, demonstrating the versatility of our approach. Our optimization approach is highly systematic and suitable for automation.

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A Task Scheduling Algorithm for Automated parallel Processing of XQuery 6

A Task Scheduling Algorithm for Automated Parallel Processin...

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6th international symposium on parallel architectures, algorithms, and programming (PAAP)

作者： Quan, Yuelong Liao, Husheng Beijing Univ Technol Coll Comp Sci Beijing Peoples R China Beijing Univ Technol Sch Software Engn Beijing Peoples R China

ISBN: (纸本)9781479938445

In this paper, a novel approach for tasks scheduling in XQuery's automatic parallel implementation is proposed. The approach solves the scheduling problem on the shared memory multithread environment, which includes three strategies, i.e. task parallelism, data parallelism and pipeline parallelism. An automaton model is established for the pipeline parallelism, which is used to reduce the idle time between pipeline stages. The experimental results show that our approach could improve the performance and have good memory efficiency.

关键词： XML XQuery parallel processing scheduling query optimization

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parallel Optimization Strategies for MIC Heterogeneous parallel Systems 6

Parallel Optimization Strategies for MIC Heterogeneous Paral...

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6th international symposium on parallel architectures, algorithms, and programming (PAAP)

作者： Ju, Tao Dong, Xiaoshe Wang, Endong Li, Liang Zhu, Zhengdong Xi An Jiao Tong Univ Sch Elect & Informat Engn Xian 710049 Peoples R China State Key Lab High End Server & Storage Technol Jinan Peoples R China

ISBN: (纸本)9781479938445

In the traditional multithread programming model, there is no dedicated performance optimization strategy for Many Integrated Core (MIC) heterogeneous system. To fully exploit the high computing power of MIC processor, this paper discusses the specific program porting and performance optimization strategies on the MIC heterogeneous parallel system based on the k-means application program. Experimental results show that the proposed porting and performance optimization strategies are effective, and can be able to guide the programmer to port and optimize applications effectively to MIC heterogeneous parallel system.

关键词： Many Integrated Core MIC heterogeneous system performance optimization

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A parallel SRM Feature Extraction Algorithm for Steganalysis Based on GPU Architecture 6

A Parallel SRM Feature Extraction Algorithm for Steganalysis...

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6th international symposium on parallel architectures, algorithms, and programming (PAAP)

作者： Chen, Kaizhi Lin, Chenjun Zhong, Shangping Guo, Longkun Fuzhou Univ Coll Math & Comp Sci Fuzhou 350108 Peoples R China

ISBN: (纸本)9781479938445

Based on GPU parallel technology, this paper proposes a parallel SRM feature extraction algorithm to accelerate the extraction of SRM feature for steganalysis of HUGO images. Using the parallel program framework of OpenCL for GPU, we parallelize and implement a serial algorithm and employ some optimization technologies for our parallel program to accelerate the extraction process. The techniques include convolution unrolling, combined memory access, aversion of bank conflicts. The experimental results show that the speed of the proposed parallel extraction algorithm for different size images is 25 similar to 55 times faster than the original serial algorithm, and 2 similar to 4.2 times faster than running the parallel method on Quad-core CPU.

关键词： parallel program Steganalysis SRM feature Open CL

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