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检索条件"任意字段=Seventh International Symposium on Parallel Architectures, Algorithms and Programming"

共 511 条记录，以下是211-220 订阅

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Performance Analysis and Optimization of the Tiled Cholesky Factorization on NUMA Machines

Performance Analysis and Optimization of the Tiled Cholesky ...

引用

international symposium on parallel architectures, algorithms and programming (PAAP)

作者： Emmanuel Jeannot LaBRI Inria Bordeaux Sud-Ouest France

We discuss some performance issues of the tiled Cholesky factorization on non-uniform memory access-time (NUMA) shared memory machines. We show how to optimize thread placement and data placement in order to achieve p... 详细信息

ISBN: (纸本)9781467345668

关键词： Kernel Tiles Instruction sets Resource management parallel processing Vectors Message systems

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The State Minimization Problem for Nondeterministic Finite Automata: The parallel Implementation of the Truncated Branch and Bound Method

The State Minimization Problem for Nondeterministic Finite A...

引用

international symposium on parallel architectures, algorithms and programming (PAAP)

作者： Boris Melnikov Andrey Tsyganov Togliatti State University Togliatti Russia Ulyanovsk State Pedagogical University Ulyanovsk Russia

ISBN: (纸本)9781467345668

In this paper we present an approach to the parallel implementation of the state minimization problem for nondeterministic finite automata. This approach is based on the truncated branch and bound method and also on the usage of basis and COM automata for the given language. Minimum state automata are searched as sub-automata of the COM automaton. Some sufficient conditions for their equivalence to the given nondeterministic automaton are proved in terms of the loops of the basis automaton. We suggest exact and heuristic state minimization algorithms, discuss their implementation details and provide some experimental results.

关键词： Automata Minimization Heuristic algorithms Algorithm design and analysis Educational institutions Electronic mail Color

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A Bridging Model for Branch-and-Bound algorithms on Multi-core architectures

A Bridging Model for Branch-and-Bound Algorithms on Multi-co...

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international symposium on parallel architectures, algorithms and programming (PAAP)

作者： Abdorreza Savadi Hossein Deldari Department computer Engineering Ferdowsi University of Mashhad Mashhad Iran Department computer Engineering Islamic Azad University Mashhad Iran

ISBN: (纸本)9781467345668

Nowadays, the evolution of multi-core architectures goes towards increasing the number of cores and levels of cache. Meanwhile, current typical parallel programming languages are unable to exploit the potential of these processors efficiently. In order to achieve desired performance on these hardwares we need to understand architectural parameters appropriately and also apply them in algorithm design. Computational models such as Multi-BSP, illustrate these parameters and explain adequate methods for designing algorithms on multi-cores. One of applicable categories of problems is Branch-and-Bound (BaB) that needs to be adapted by such model for implementing on these systems. In this paper, we have attempted to make a mapping between BaB run-time tree and the Memory Hierarchy Tree (MT) of multi-core processor. Multi-BSP model inspired us to introduce Multi-BaB model. Analogous to Multi-BSP analysis, bounds for communication and synchronization costs have been presented in the paper respecting BaB algorithms. This work is a step towards making multi-core programming efficient and tries to obtain correct analysis of BaB algorithm behavior on multi-core architectures.

关键词： Algorithm design and analysis Computational modeling Computer architecture Adaptation models Search problems Program processors programming

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An OpenCL Implementation of Sketch-Based Network Traffic Change Detection on GPU

An OpenCL Implementation of Sketch-Based Network Traffic Cha...

引用

international symposium on parallel architectures, algorithms and programming (PAAP)

作者： Theophilus Wellem Yu-Kuen Lai Department of Information Systems Satya Wacana Christian University Salatiga Indonesia Department of Electrical Engineering Chung Yuan Christian University Chung Li Taiwan

ISBN: (纸本)9781467345668

GPU and other SIMD stream architecture have been used for accelerating packet processing applications. This paper explores the design space on GPU for sketch-based network traffic change detection application by using OpenCL parallel programming framework. Due to the parallel nature of sketch data structure, the computations can be mapped to OpenCL execution model on GPU efficiently. The sketch data structure is mapped to buffer object in device's global memory, and work-items are executed on the sketch in parallel. Compared to the sequential CPU implementation, the experiment results on Radeon HD 5870 GPU show that the hash computation and ESTIMATE operation achieved about 15 times and 9 times speedup, respectively.

关键词： Kernel Graphics processing units Computational modeling Radiation detectors parallel processing programming Data structures

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parallel Monte Carlo Search for Imperfect Information Game Daihinmin

Parallel Monte Carlo Search for Imperfect Information Game D...

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international symposium on parallel architectures, algorithms and programming (PAAP)

作者： Junji Nishino Tetsuro Nishino Department of Informatics Graduate School of Informatics and Engineering University of Electro-Communications Chofu Tokyo Japan

ISBN: (纸本)9781467345668

Computer games, such as chess, have recently become an important research topic in the field of computation intelligence. Monte Carlo massive searching is very successful in the game of GO as it has a huge intractable search space and no good partial evaluation heuristics. Imperfect information games also have intractable properties, such as large scale search space, less heuristics, and unknown state information. Monte Carlo search is therefore effective to make computer players for the imperfect information game. There is always a time limit for using computational intelligence in actual applications. Such constraints require parallel processing to be speed up the Monte Carlo simulations. We introduce a parallel Monte Carlo searching method for imperfect information card game Daihinmin, a familiar card game in Japan. Computer Daihinmin competitions have been held since 2006. We present two kinds of parallelization algorithms for Monte Carlo computer Daihinmin players.

关键词： Games Monte Carlo methods Computers Search problems Computational modeling Educational institutions parallel processing

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Restricted Duplication Based MILP Formulation for Scheduling Task Graphs on Unrelated parallel Machines

Restricted Duplication Based MILP Formulation for Scheduling...

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international symposium on parallel architectures, algorithms and programming (PAAP)

作者： Jagpreet Singh Bhargav Mangipudi Sandeep Betha Nitin Auluck Department of Computer Science & Engineering Indian Institute of Technology Ropar Rupnagar India

ISBN: (纸本)9781467345668

Duplication has proved to be a vital technique for scheduling task graphs on a network of unrelated parallel machines. Few attempts have been made to model duplication in a Mixed Integer Linear Program (MILP) to reduce schedule length. Other known optimal MILPs duplicate a job on all the available processing elements and this increases their complexities. This paper proposes a new REStricted Duplication (RESDMILP) approach to model duplication in a MILP. The complexity of this model increases with the increase in the amount of duplication. Experiments conducted have revealed that RESDMILP achieves better runtimes when the problem instance is solved optimally and provides better lower bound and percentage gap if it is run for a fixed amount of time. The percentage gap is defined as (U B - LB)/U B where U B and LB are the upper and lower bounds achieved by the MILPs respectively.

关键词： Processor scheduling Schedules Computational modeling Computer architecture Approximation methods Scheduling parallel machines

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Proceedings - 2011 4th international symposium on parallel architectures, algorithms and programming, PAAP 2011

Proceedings - 2011 4th International Symposium on Parallel A...

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2011 4th international symposium on parallel architectures, algorithms and programming, PAAP 2011

ISBN: (纸本)9780769545752

The proceedings contain 66 papers. The topics discussed include: option pricing on the GPU with backward stochastic differential equation;DHFS: a high-throughput heterogeneous file system based on mainframe for cloud storage;security-driven fault tolerant scheduling algorithm for high dependable distributed real-time system;a polynomial algorithm for the vertex disjoint min-min problem in planar graphs;improving parallel FDTD method performance using SSE instructions;communication-aware design space exploration for efficient run-time MPSoC management;energy minimization for software real-time systems with uncertain execution time;an efficient algorithm for privacy preserving maximal frequent itemsets mining;distributed network resources monitoring based on multi-agent and matrix grammar;an implementation of GPU-based parallel optimization for an extended uncertain data query algorithm;and job scheduling optimization for multi-user MapReduce clusters.

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Designing a Multicore Graph Library

Designing a Multicore Graph Library

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international symposium on parallel and Distributed Processing with Applications, ISPA

作者： Phillippe Samer Afonso H. Sampaio Anolan Milanés Sebastian Urrutia Universidade Federal de Minas Gerais Belo Horizonte Minas Gerais Brazil

Graph Theory provides a set of powerful tools (both theorems and algorithms) for problem modeling and solving in numerous domains. Though there are several libraries implementing graph algorithms and targeting different platforms and users, few of those offer parallel implementations. To the best of our knowledge, there is a particular need for an easier to use and extend library, specifically designed to exploit the multicore architecture trend for high performance parallelism. In this paper we describe Magical, a new OpenMP-based C++ multicore graph library. Our focus is to provide an implementation of graph algorithms which is designed for multicore architectures, by means of an easy to use application programming interface. We describe the library design and evaluate its performance by means of a case study concerning a shortest-paths problem.

关键词： Libraries Algorithm design and analysis Multicore processing Data structures Vectors programming

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An Early Evaluation of the Scalability of Graph algorithms on the Intel MIC Architecture

An Early Evaluation of the Scalability of Graph Algorithms o...

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IEEE international symposium on parallel and Distributed Processing Workshops and Phd Forum (IPDPSW)

作者： Erik Saule Ümit V. Çatalyürek Department of Biomedical Informatics Ohio State University USA Department of Biomedical Informatics Department of Electrical and Computer Engineering Ohio State University USA

Graph algorithms are notorious for not getting good speedup on parallel architectures. These algorithms tend to suffer from irregular dependencies and a high synchronization cost that prevent an efficient execution on distributed memory machines. Hence such algorithms are mostly parallelized on shared memory machines. However, current commodity shared memory machines do not typically offer enough parallelism to process these problems. In this paper, we are presenting an early investigation of the scalability of such algorithms on Intel's upcoming Many Integrated Core (Intel MIC) architecture which, when it will be released in 2012, is expected to provide more than 50 physical cores with SMT capability. The Intel MIC architecture can be programmed through many programming models, here we investigate the three most popular of these models namely OpenMP, Cilk Plus and Intel's TBB. We present scalability results of a parallel graph coloring algorithm, three variations of a breadth-first search algorithm and a micro benchmark for irregular computations using these three programming models. Our results on a prototype board show that the multi-threaded architecture of Intel MIC can be effectively used for hiding latencies in irregular applications to achieve almost perfect speedup.

关键词： Microwave integrated circuits programming Instruction sets Computer architecture Computational modeling Kernel Image color analysis

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ShyLU: A Hybrid-Hybrid Solver for Multicore Platforms

ShyLU: A Hybrid-Hybrid Solver for Multicore Platforms

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international symposium on parallel and Distributed Processing (IPDPS)

作者： Sivasankaran Rajamanickam Erik G. Boman Michael A. Heroux Sandia National Laboratories USA

With the ubiquity of multicore processors, it is crucial that solvers adapt to the hierarchical structure of modern architectures. We present ShyLU, a “hybrid-hybrid” solver for general sparse linear systems that is hybrid in two ways: First, it combines direct and iterative methods. The iterative part is based on approximate Schur complements where we compute the approximate Schur complement using a value-based dropping strategy or structure-based probing strategy. Second, the solver uses two levels of parallelism via hybrid programming (MPI+threads). ShyLU is useful both in shared-memory environments and on large parallel computers with distributed memory. In the latter case, it should be used as a subdomain solver. We argue that with the increasing complexity of compute nodes, it is important to exploit multiple levels of parallelism even within a single compute node. We show the robustness of ShyLU against other algebraic preconditioners. ShyLU scales well up to 384 cores for a given problem size. We also study the MPI-only performance of ShyLU against a hybrid implementation and conclude that on present multicore nodes MPI-only implementation is better. However, for future multicore machines (96 or more cores) hybrid/ hierarchical algorithms and implementations are important for sustained performance.

关键词： Particle separators parallel processing Multicore processing Approximation algorithms Iterative methods Linear systems Robustness

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