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检索条件"任意字段=Seventh International Symposium on Parallel Architectures, Algorithms and Programming"

共 511 条记录，以下是21-30 订阅

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parallel algorithms for Testing Length Four Permutations 6

Parallel Algorithms for Testing Length Four Permutations

引用

6th international symposium on parallel architectures, algorithms, and programming (PAAP)

作者： Han, Yijie Saxena, Sanjeev Univ Missouri Sch Comp & Engn Kansas City MO 64110 USA Indian Inst Technol Dept Comp Sci & Engn Kanpur 208016 Uttar Pradesh India

ISBN: (纸本)9781479938445

We present new parallel algorithms for testing pattern involvement for all length 4 permutations. Our algorithms have the complexity of O(log n) time with n/log n processors on the CREW PRAM model, O(log log log n) time with n/log log log n processors or constant time and n log 3 n processors on a CRCW PRAM model. parallel algorithms were not designed before for some of these patterns and for other patters the previous best algorithms require O(log n) time and n processors on the CREW PRAM model.

关键词： Separable permutations length 4 permutations pattern matching parallel algorithms

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A Task Scheduling Algorithm for Automated parallel Processing of XQuery 6

A Task Scheduling Algorithm for Automated Parallel Processin...

引用

6th international symposium on parallel architectures, algorithms, and programming (PAAP)

作者： Quan, Yuelong Liao, Husheng Beijing Univ Technol Coll Comp Sci Beijing Peoples R China Beijing Univ Technol Sch Software Engn Beijing Peoples R China

ISBN: (纸本)9781479938445

In this paper, a novel approach for tasks scheduling in XQuery's automatic parallel implementation is proposed. The approach solves the scheduling problem on the shared memory multithread environment, which includes three strategies, i.e. task parallelism, data parallelism and pipeline parallelism. An automaton model is established for the pipeline parallelism, which is used to reduce the idle time between pipeline stages. The experimental results show that our approach could improve the performance and have good memory efficiency.

关键词： XML XQuery parallel processing scheduling query optimization

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Sparse Matrix-Vector Multiplication Based on Network-on-Chip: On Data Mapping

Sparse Matrix-Vector Multiplication Based on Network-on-Chip...

引用

5th international symposium on parallel architectures, algorithms and programming (PAAP)

作者： Mansour, Ahmad Goetze, Juergen TU Dortmund Informat Proc Lab Dortmund Germany

ISBN: (纸本)9780769548982;9781467345668

Sparse Matrix-Vector Multiplication (SMVM) on parallel hardware is a very sophisticated problem because of the irregular data communication requirements. The communication volume in the parallel hardware is determined by how data is distributed among the processing elements. In this paper we introduce two methods of data mapping for SMVM based on Network-on-Chip (NoC) in order to spread the load among its components. Later, we introduce the effect of recordering of the sparse matrix on those mapping methods. Simulations are performed using an OMNet++ based NoC simulator.

关键词： data communication network-on-chip parallel processing public domain software sparse matrices

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parallel Optimization Strategies for MIC Heterogeneous parallel Systems 6

Parallel Optimization Strategies for MIC Heterogeneous Paral...

引用

6th international symposium on parallel architectures, algorithms, and programming (PAAP)

作者： Ju, Tao Dong, Xiaoshe Wang, Endong Li, Liang Zhu, Zhengdong Xi An Jiao Tong Univ Sch Elect & Informat Engn Xian 710049 Peoples R China State Key Lab High End Server & Storage Technol Jinan Peoples R China

ISBN: (纸本)9781479938445

In the traditional multithread programming model, there is no dedicated performance optimization strategy for Many Integrated Core (MIC) heterogeneous system. To fully exploit the high computing power of MIC processor, this paper discusses the specific program porting and performance optimization strategies on the MIC heterogeneous parallel system based on the k-means application program. Experimental results show that the proposed porting and performance optimization strategies are effective, and can be able to guide the programmer to port and optimize applications effectively to MIC heterogeneous parallel system.

关键词： Many Integrated Core MIC heterogeneous system performance optimization

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Adaptive Diagnosis in the Locally Twisted Cube

Adaptive Diagnosis in the Locally Twisted Cube

引用

5th international symposium on parallel architectures, algorithms and programming (PAAP)

作者： Han, Yuejuan Fan, Jianxi You, Lantao Cheng, Baolei Wang, Yan Soochow Univ Sch Comp Sci & Technol Suzhou Peoples R China

ISBN: (纸本)9780769548982;9781467345668

Adaptive diagnosis in the locally twisted cube is studied in this paper. Let LTQ(n) denote the n-dimensional locally twisted cube. We prove that for any integer n >= 3, LTQ(n) can be adaptively diagnosed using at most 4 parallel testing rounds, with at most n faulty nodes, where each node participates in at most one test in each round. The proof and algorithm of adaptive diagnosis in LTQ(n) have been proposed in this paper.

关键词： interconnection networks the locally twisted cube adaptive diagnosis parallel computing

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Improvement of Workload Balancing Using parallel Loop Self-Scheduling on Xeon Phi 7

Improvement of Workload Balancing Using Parallel Loop Self-S...

引用

seventh international symposium on parallel architectures, algorithms and programming

作者： Huang, Chao-Wei Kuo, Chan-Fu Yang, Chao-Tung Liu, Jung-Chun Chen, Shuo-Tsung Tunghai Univ Dept Comp Sci Taichung 40704 Taiwan

ISBN: (纸本)9781467391160

In this paper, we will examine how to improve workload balancing on a computing cluster by a parallel loop self-scheduling scheme. We use hybrid MPI and OpenMP parallel programming in C language. The block partition loop is according to the performance weighting of compute nodes. This study implements parallel loop self-scheduling use Xeon Phi, with its characteristics to improve workload balancing between heterogeneous nodes. The parallel loop self-scheduling is composed of the static and dynamic allocation. A weighting algorithm is adopted in the static part while the well-known loop self-scheduling scheme is adopted in the dynamic part. In recent years, Intel promotes its new product Xeon Phi coprocessor, which is similar to the x86 architecture coprocessor. It has about 60 cores and can be regarded as a single computing node, with the computing power that cannot be ignored. In our experiment, we will use a plurality of computing nodes. We compute four applications, i.e., matrix multiplication, sparse matrix multiplication, Mandelbrot set computation, and the circuit satisfiability problem. Our results will show how to do the weight allocation and how to choose a scheduling scheme to achieve the best performance in the parallel loop self-scheduling.

关键词： Xeon Phi Many-core OpenMP MPI parallel Loop Self-Scheduling

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A bridging model for branch-and-bound algorithms on multi-core architectures

A bridging model for branch-and-bound algorithms on multi-co...

引用

5th international symposium on parallel architectures, algorithms and programming (PAAP)

作者： Savadi, Abdorreza Deldari, Hossein Ferdowsi Univ Mashhad Dept Comp Engn Mashhad Iran Islamic Azad Univ Mashhad Branch IAUM Dept Comp Engn Mashhad Iran

ISBN: (纸本)9780769548982;9781467345668

Nowadays, the evolution of multi-core architectures goes towards increasing the number of cores and levels of cache. Meanwhile, current typical parallel programming languages are unable to exploit the potential of these processors efficiently. In order to achieve desired performance on these hardwares we need to understand architectural parameters appropriately and also apply them in algorithm design. Computational models such as Multi-BSP, illustrate these parameters and explain adequate methods for designing algorithms on multi-cores. One of applicable categories of problems is Branch-and-Bound (BaB) that needs to be adapted by such model for implementing on these systems. In this paper, we have attempted to make a mapping between BaB run-time tree and the Memory Hierarchy Tree (MT) of multi-core processor. Multi-BSP model inspired us to introduce Multi-BaB model. Analogous to Multi-BSP analysis, bounds for communication and synchronization costs have been presented in the paper respecting BaB algorithms. This work is a step towards making multi-core programming efficient and tries to obtain correct analysis of BaB algorithm behavior on multi-core architectures.

关键词： Multi-BSP Branch-and-Bound(BaB) parallel Model Multi-core architectures Cache Memory Hierarchy

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The state minimization problem for nondeterministic finite automata: the parallel implementation of the truncated branch and bound method

The state minimization problem for nondeterministic finite a...

引用

5th international symposium on parallel architectures, algorithms and programming (PAAP)

作者： Melnikov, Boris Tsyganov, Andrey Togliatti State Univ Tolyatti Russia Ulyanovsk State Pedag Univ Ulyanovsk Russia

ISBN: (纸本)9780769548982;9781467345668

In this paper we present an approach to the parallel implementation of the state minimization problem for nondeterministic finite automata. This approach is based on the truncated branch and bound method and also on the usage of basis and COM automata for the given language. Minimum state automata are searched as sub-automata of the COM automaton. Some sufficient conditions for their equivalence to the given nondeterministic automaton are proved in terms of the loops of the basis automaton. We suggest exact and heuristic state minimization algorithms, discuss their implementation details and provide some experimental results.

关键词： finite automata nondeterminisitc automata state minimization parallelism OpenMP MPI

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A parallel SRM Feature Extraction Algorithm for Steganalysis Based on GPU Architecture 6

A Parallel SRM Feature Extraction Algorithm for Steganalysis...

引用

6th international symposium on parallel architectures, algorithms, and programming (PAAP)

作者： Chen, Kaizhi Lin, Chenjun Zhong, Shangping Guo, Longkun Fuzhou Univ Coll Math & Comp Sci Fuzhou 350108 Peoples R China

ISBN: (纸本)9781479938445

Based on GPU parallel technology, this paper proposes a parallel SRM feature extraction algorithm to accelerate the extraction of SRM feature for steganalysis of HUGO images. Using the parallel program framework of OpenCL for GPU, we parallelize and implement a serial algorithm and employ some optimization technologies for our parallel program to accelerate the extraction process. The techniques include convolution unrolling, combined memory access, aversion of bank conflicts. The experimental results show that the speed of the proposed parallel extraction algorithm for different size images is 25 similar to 55 times faster than the original serial algorithm, and 2 similar to 4.2 times faster than running the parallel method on Quad-core CPU.

关键词： parallel program Steganalysis SRM feature Open CL

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PPMA: parallel programming Model for an Audio Application Specific Multi-core DSP 6

PPMA: Parallel Programming Model for an Audio Application Sp...

引用

6th international symposium on parallel architectures, algorithms, and programming (PAAP)

作者： Xu Jiangwei Wei Zhenqi Liu Peilin Shanghai Jiao Tong Univ Sch Elect Informat & Elect Engn Shanghai 200030 Peoples R China

ISBN: (纸本)9781479938445

In recent years, multi-core digital signal processors (DSPs) have been widely used to improve execution efficiency in a variety of applications. In order to fully explore the parallel processing capacity of DSPs, a well-designed parallel programming model is essential for programmers. In this paper, a parallel programming model for a self-designed multi-core audio DSP (MAD) is proposed based on both shared-memory and message-passing communication mechanisms. A set of application program interfaces (APIs) of PPMA are provided to realize inter-core data transmission and synchronization controlling with high efficiency. To evaluate performance improvement of audio applications using PPMA, a low bit-rate speech codec application is ported to the MAD. With the help of PPMA, task scheduling of speech codec can be implemented conveniently. Experimental results also show that the overhead of inter-core communication in MAD is negligible compared to the parallel speedup achieved by PPMA.

关键词： parallel programming Model Multi-Core DSP Shared Memory Message Passing Low Bit-Rate Speech Codec

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