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A scalable method for predicting network performance in heterogeneous clusters

A scalable method for predicting network performance in hete...

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international symposium on parallel architectures, algorithms and Networks (ISPAN)

作者： D. Katramatos S.J. Chapin Department of Computer Science University of Virginia Charlottesville VA USA Department of Electrical Engineering and Computer Science Syracuse University Syracuse NY USA

An important requirement for the effective scheduling of parallel applications on large heterogeneous clusters is a current view of system resource availability. Maintaining such a view is a time consuming problem, potentially O(N/sup 2/). Although CPU availability is relatively easy to monitor, interconnecting network bandwidth varies not only with network topology, but also with message size and even with respect to the load of the communicating nodes. This paper describes a method for predicting a cluster's network performance for the purpose of scheduling parallel applications. The method generates a cluster-specific network model which can predict the latency of communications between any pair of nodes in linear time and under any computational and/or communication load conditions. The paper also presents the models generated for the Centurion cluster at the University of Virginia and the Orange Grove cluster at Syracuse University. A study of the prediction accuracy of the method under various load conditions by comparison to experimental measurements indicates an average prediction error of approximately 5% with the maximum encountered prediction error of less than 9%.

关键词： Intelligent networks Availability Delay Processor scheduling Network topology Computer networks programming environments Bandwidth Condition monitoring Computer science

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SWARM: A parallel programming Framework for Multicore Processors

SWARM: A Parallel Programming Framework for Multicore Proces...

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international symposium on parallel and Distributed Processing (IPDPS)

作者： David A. Bader Varun Kanade Kamesh Madduri College of Computing Georgia Institute of Technology Atlanta GA USA

Due to fundamental physical limitations and power constraints, we are witnessing a radical change in commodity microprocessor architectures to multicore designs. Continued performance on multicore processors now requires the exploitation of concurrency at the algorithmic level. In this paper, we identify key issues in algorithm design for multicore processors and propose a computational model for these systems. We introduce SWARM (software and algorithms for running on multi-core), a portable open-source parallel library of basic primitives that fully exploit multicore processors. Using this framework, we have implemented efficient parallel algorithms for important primitive operations such as prefix-sums, pointer-jumping, symmetry breaking, and list ranking; for combinatorial problems such as sorting and selection; for parallel graph theoretic algorithms such as spanning tree, minimum spanning tree, graph decomposition, and tree contraction; and for computational genomics applications such as maximum parsimony. The main contributions of this paper are the design of the SWARM multicore framework, the presentation of a multicore algorithmic model, and validation results for this model. SWARM is freely available as open-source from http://***/.

关键词： parallel programming Multicore processing Open source software Tree graphs Concurrent computing Algorithm design and analysis Microprocessors Computer architecture Process design Computational modeling

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Adsmith: an efficient object-based distributed shared memory system on PVM

Adsmith: an efficient object-based distributed shared memory...

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international symposium on parallel architectures, algorithms and Networks (ISPAN)

作者： Wen-Yew Liang Chun-Ta King Feipei Lai Department Computer Science and Information Engineering National Taiwan University Taipei Taiwan Department Computer Science National Tsing Hua University Hsinchu Taiwan Department Electrical Engineering & Department Computer Sciencand Information Engineeringe National Taiwan University Taipei Taiwan

ISBN: (纸本)0818674601

In this paper, we describe an object-based distributed shared memory called Adsmith. In an object-based DSM, the shared memory consists of many shared objects, through which the shared memory is accessed. Adsmith is built on top of PVM at the library layer using C++. PVM is used as the communication subsystem, because it is a de facto standard and encapsulates many system related details. Several mechanisms are used to improve the performance of Adsmith, such as release memory consistency, load/store-like memory accesses, nonblocking accesses, and atomic operations, etc. Performance results show that even though Adsmith is implemented on top of PVM, programs running on Adsmith can achieve a performance comparable with those running directly on PVM.

关键词： programming profession Computer science Distributed computing Libraries Concurrent computing High performance computing Memory management Hardware Operating systems Communication standards

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Designing a Multicore Graph Library

Designing a Multicore Graph Library

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international symposium on parallel and Distributed Processing with Applications, ISPA

作者： Phillippe Samer Afonso H. Sampaio Anolan Milanés Sebastian Urrutia Universidade Federal de Minas Gerais Belo Horizonte Minas Gerais Brazil

Graph Theory provides a set of powerful tools (both theorems and algorithms) for problem modeling and solving in numerous domains. Though there are several libraries implementing graph algorithms and targeting different platforms and users, few of those offer parallel implementations. To the best of our knowledge, there is a particular need for an easier to use and extend library, specifically designed to exploit the multicore architecture trend for high performance parallelism. In this paper we describe Magical, a new OpenMP-based C++ multicore graph library. Our focus is to provide an implementation of graph algorithms which is designed for multicore architectures, by means of an easy to use application programming interface. We describe the library design and evaluate its performance by means of a case study concerning a shortest-paths problem.

关键词： Libraries Algorithm design and analysis Multicore processing Data structures Vectors programming

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Hectiling: an integration of fine and coarse-grained load-balancing strategies 98

Hectiling: an integration of fine and coarse-grained load-ba...

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international symposium on High Performance Distributed Computing

作者： S.H. Russ I. Banicescu S. Ghafoor B. Janapareddi J. Robinson Rong Lu NSF Engineering Research Center for Computational Field Simulation Mississippi State University USA

ISBN: (纸本)9780818685798

General-purpose programmers have come to expect a high degree of portability among widely varying architectures. Advances in run-time systems for parallel programs have been proposed in order to harness available resources as efficiently as possible. Simultaneously, advances in algorithmic methods of dynamically balancing computational load have been proposed in order to respond to variations in actual performance and therefore in run-time. The primary mechanism for harnessing idle resources effectively, task migration, can be used alongside the primary mechanism for dynamic load balancing, data redistribution. Besides the fact that the two methods can be used simultaneously to spur further increases in performance, the run-time information-gathering infrastructure necessary to detect and use idle resources can also benefit dynamically load-balanced applications. This paper describes an architecture for and preliminary implementation of a system that combines data-parallel load balancing with task-parallel load balancing. Performance test results are included as well.

关键词： Yarn programming profession Workstations Computational modeling Heuristic algorithms Runtime Load management System testing Application software Operating systems

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Job Scheduling Techniques for Distributed Systems with Heterogeneous Processor Cardinality

Job Scheduling Techniques for Distributed Systems with Heter...

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international symposium on parallel architectures, algorithms and Networks (ISPAN)

作者： Hung-Jui Chang Jan-Jan Wu Pangfeng Liu Department of Computer Science and Information Engineering National Taiwan University of Science and Technology Taipei Taiwan Institute of Information Science Research Center for Information Technology Innovation Academia Sinica Nankang Taiwan Department of Computer Science and Information Engineering Graduate Institute of Networking and Multimedia National Taiwan University of Science and Technology Taipei Taiwan

This paper proposes scheduling algorithms for assigning jobs with different release time and execution time, to machines with heterogeneous processor cardinality. We show that this scheduling problem is NP-complete, and propose dynamic programming to find the optimal schedules. Since the dynamic programming is time-consuming we propose techniques that improve the efficiency of the dynamic programming. We also propose heuristic algorithms for this scheduling problem. Experimental results suggest that some of the heuristics not only compute the answer efficiently but also provide good solution.

关键词： Processor scheduling Optimal scheduling Scheduling algorithm Grid computing Dynamic programming Biomedical computing Delay Approximation algorithms Computer science Heuristic algorithms

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Bubble scheduling: A quasi dynamic algorithm for static allocation of tasks to parallel architectures

Bubble scheduling: A quasi dynamic algorithm for static allo...

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international symposium on parallel and Distributed Processing (IPDPS)

作者： Yu-Kwong Kwok I. Ahmad Department of Computer Science Hong Kong University of Science and Technology Hong Kong China

We propose an algorithm for scheduling and allocation of parallel programs to message-passing architectures. The algorithm considers arbitrary computation and communication costs, arbitrary network topology, link contention and underlying communication routing strategy. While our technique is static, the algorithm is quasi dynamic because it is not specific to any particular system topology and thus can be used at run-time for the processor configuration available at that time. The proposed algorithm, called Bubble Scheduling and Allocation (BSA) algorithm, works by first serializing the task graph and "injecting" all the tasks to one processor. The parallel tasks are then "bubbled up" to other processors and are inserted at appropriate time slots. The edges among the tasks are also scheduled by treating communication links between the processors as resources. The scheduling of messages on the links depends on the routing strategy, such as circuit switching and wormhole routing, of the underlying network. The proposed algorithm has admissible time complexity and is suitable for regular as well as irregular task graph structures.

关键词： Dynamic scheduling Heuristic algorithms Scheduling algorithm Processor scheduling Routing Network topology Computer architecture Computer networks Computational efficiency Runtime

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Bit level processor arrays: current architectures and a design and programming tool

Bit level processor arrays: current architectures and a desi...

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IEEE international symposium on Circuits and Systems (ISCAS)

作者： M.T. O'Keefe J.A.B. Fortes School of Electrical Engineering Purdue University West Lafayette IN USA

The authors review bit-level processor arrays and the common characteristics that make them ideal for VLSI and high-speed computations. Emphasis is on arrays that have been implemented rather than proposed architectures. The essential features shared by these arrays, and those that differentiate them are characterized and used to develop a taxonomy for bit-level processor arrays. The authors also discuss programming tools, with an emphasis on RAB, a large program used to map a class of algorithms written in C onto bit-level processor arrays. The basic components and extensions to RAB are discussed. Directions of current research and design of bit-level processor array architectures and their programming environments are also briefly discussed.< >

关键词： Very large scale integration Computer architecture parallel processing Logic arrays Hardware Concurrent computing Communication system control Member and Geographic Activities Board committees Systolic arrays Image processing

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Prototyping N-body simulation in Proteus

Prototyping N-body simulation in Proteus

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international symposium on parallel Processing

作者： P.H. Mills L.S. Nyland J.F. Prins J.H. Reif Department of Computer Science Duke University Durham NC USA Department of Computer Science North Carolina State University Chapel Hill NC USA

This paper explores the use of Proteus, an architecture-independent language suitable for prototyping parallel and distributed programs. Proteus is a high-level imperative notation based on sets and sequences with a single construct for the parallel composition of processes communicating through shared memory. Several different parallel algorithms for N-body simulation are presented in Proteus, illustrating how Proteus provides a common foundation for expressing the various parallel programming models. This common foundation allows prototype parallel programs to be tested and evolved without the use of machine-specific languages. To transform prototypes to implementations on specific architectures, program refinement techniques are utilized. Refinement strategies are illustrated that target broad-spectrum parallel intermediate languages, and their viability is demonstrated by refining an N-body algorithm to data-parallel CVL code.< >

关键词： Virtual prototyping Prototypes Computer architecture Computational modeling parallel programming Computer science parallel algorithms Concurrent computing Testing Yarn

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Traffic Speed Prediction of Road Cluster with Heterogeneous Sampling Frequency

Traffic Speed Prediction of Road Cluster with Heterogeneous ...

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international symposium on parallel architectures, algorithms and programming (PAAP)

作者： Guiyuan Jiang Peilan He Jigang Wu Yidan Sun Thambipillai Srikanthan Ocean University of China Qingdao China Guangdong University of Technology Guangzhou China Nanyang Technological University Singapore

ISBN: (纸本)9781665452199

Accurate short-term road traffic prediction is essential for achieving intelligent transportation systems, such as traffic management, travel route planning, and navigation. The existing works typically provide the prediction for an individual road segment each time. Even though some models aim to simultaneously predict the traffic of a cluster of road segments, they usually assume that the road cluster has a regular network topology (e.g., ring network or grid network). These methods cannot be easily extended to road networks of arbitrary graph topology. This paper addresses the problem of traffic speed prediction for a cluster of road segments with arbitrary topology and heterogeneous sampling frequency of traffic states. We propose a novel prediction framework consisting of three modules: network partitioning, feature extraction, and traffic prediction modules. The first module divides the entire traffic network into several disjoint clusters with high intra-clusters similarity and low intercluster similarity, based on our proposed measurement metrics for measuring the similarity of time series with heterogeneous sampling frequency. The second module extract features that capture temporal correlations of speed series and contextual factors (e.g., road network characteristics and extrinsic factors) while considering the heterogeneity in data frequency. The third module relies on the obtained features to simultaneously predict the traffic states of all road segments in a cluster, where the spatial correlations among roadways are captured via an attention mechanism. The performance is evaluated using large-scale real-world traffic data involving 42 bus services.

关键词： Time-frequency analysis Correlation Network topology Roads Time series analysis programming Feature extraction

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