检索结果-内蒙古大学图书馆

您好，读者！请登录

内蒙古大学图书馆

首页
概况
党建
资源
服务
科研支持
- 论文收录引用证明
- 科技查新
知识产权
档案馆
帮助

咨询与建议

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

您的常用邮箱：*

您的手机号码：*

问题描述：

当前已输入0个字，您还可以输入200个字

全部搜索
期刊论文
图书
学位论文
标准
纸本馆藏
外文资源发现
数据库导航
超星发现

高级检索

时间限定

出版年份：

文献类型

图书期刊文献学位论文多媒体

馆藏选择

电子馆藏纸本馆藏

核心期刊

全部期刊 SCI 收录期刊 SSCI 收录期刊 EI 收录期刊 CSCD 收录期刊 CSSCI 收录期刊

语言

中文英文

文献类型

期刊文献图书学位论文标准纸本馆藏

帮助

文字说明：

T=题名（书名、题名），A=作者（责任者），K=主题词，P=出版物名称，PU=出版社名称，O=机构（作者单位、学位授予单位、专利申请人），L=中图分类号，C=学科分类号，U=全部字段，Y=年（出版发行年、学位年度、标准发布年）

检索规则说明：

AND代表“并且”；OR代表“或者”；NOT代表“不包含”；(注意必须大写,运算符两边需空一格)

检索范例：

范例一：(K=图书馆学 OR K=情报学) AND A=范并思 AND Y=1982-2016
范例二：P=计算机应用与软件 AND (U=C++ OR U=Basic) NOT K=Visual AND Y=2011-2016

分类表

所选分类

>> <<

限定检索结果

文献类型

1,074 篇 会议
76 篇 期刊文献

馆藏范围

1,150 篇 电子文献
0 种 纸本馆藏

日期分布

学科分类号

630 篇 工学
- 474 篇 电气工程
- 452 篇 计算机科学与技术...
- 410 篇 信息与通信工程
- 277 篇 软件工程
- 123 篇 电子科学与技术（可...
- 22 篇 控制科学与工程
- 12 篇 光学工程
- 12 篇 动力工程及工程热...
- 8 篇 仪器科学与技术
- 6 篇 航空宇航科学与技...
- 5 篇 建筑学
- 5 篇 土木工程
- 5 篇 化学工程与技术
- 5 篇 生物医学工程（可授...
- 4 篇 机械工程
- 2 篇 交通运输工程
- 2 篇 生物工程
165 篇 理学
- 140 篇 数学
- 41 篇 物理学
- 17 篇 统计学（可授理学、...
- 8 篇 系统科学
- 4 篇 生物学
- 3 篇 化学
33 篇 军事学
- 33 篇 军队指挥学
28 篇 管理学
- 25 篇 管理科学与工程(可...
- 11 篇 工商管理
- 3 篇 图书情报与档案管...
5 篇 经济学
- 5 篇 应用经济学
3 篇 医学
- 3 篇 临床医学
- 2 篇 基础医学(可授医学...
2 篇 法学
1 篇 教育学

主题

208 篇 hardware
204 篇 digital signal p...
123 篇 computer archite...
101 篇 field programmab...
97 篇 signal processin...
95 篇 decoding
90 篇 algorithm design...
78 篇 signal processin...
76 篇 very large scale...
67 篇 throughput
64 篇 costs
59 篇 energy consumpti...
49 篇 arithmetic
48 篇 delay
46 篇 application soft...
42 篇 multimedia syste...
36 篇 parallel process...
36 篇 design methodolo...
35 篇 application spec...
35 篇 clocks

机构

9 篇 department of el...
9 篇 imec leuven
8 篇 department of el...
7 篇 school of electr...
6 篇 philips research...
6 篇 southeast univ n...
5 篇 univ of minnesot...
5 篇 arizona state un...
5 篇 univ maryland de...
5 篇 seoul natl univ ...
5 篇 southeast univ l...
5 篇 graduate institu...
5 篇 department of el...
5 篇 natl taiwan univ...
4 篇 univ kaiserslaut...
4 篇 school of electr...
4 篇 universitaet han...
4 篇 institute of dig...
4 篇 univ of southwes...
4 篇 faraday technolo...

作者

12 篇 liang-gee chen
12 篇 chakrabarti chai...
12 篇 k.k. parhi
11 篇 wu an-yeu
11 篇 m.h. sunwoo
11 篇 yin-tsung hwang
11 篇 sung wonyong
10 篇 an-yeu wu
10 篇 bhattacharyya sh...
9 篇 chen liang-gee
9 篇 f. catthoor
8 篇 cavallaro joseph...
8 篇 m.j. irwin
8 篇 sunwoo myung h.
8 篇 parhi keshab k.
7 篇 catthoor f
6 篇 h. meyr
6 篇 zhiyuan yan
6 篇 you xiaohu
6 篇 zhang chuan

语言

1,150 篇 英文

检索条件"任意字段=SiPS 2005: IEEE Workshop on Signal Processing Systems - Design and Implementation"

共 1150 条记录，以下是61-70 订阅

全选清除本页清除全部题录导出标记到"检索档案"

详细简洁

排序：

design space exploration of dataflow-based Smith-Waterman FPGA implementations

Design space exploration of dataflow-based Smith-Waterman FP...

引用

ieee International workshop on signal processing systems (sips)

作者： Casale-Brunet, Simone Bezati, Endri Mattavelli, Marco Swiss Inst Bioinformat Lausanne Switzerland Ecole Polytech Fed Lausanne Lausanne Switzerland

ISBN: (纸本)9781538604465

The paper presents the results of design space explorations for the implementation of the Smith-Waterman (S-W) algorithm performing DNA and protein sequences alignment. Both design explorations studies and FPGA implementations are obtained by developing a dynamic dataflow program implementing the algorithm and by direct high-level synthesis (HLS) to FPGA HDL. The main feature of the obtained implementation is a low-latency, pipelinable multistage processing element (PE), providing a substantial decrease in resource utilization and increase in computation throughput when compared to state of the art solutions. The implementation solution is also fully scalable and can be efficiently reconfigured according to the DNA sequence sizes and performance requirements of the system architecture. The implementation solution presented in the paper can efficiently scale up to 250MHz obtaining 14746 Alignments/s using a single S-W core with 4 PEs, and up to 31.8 MegaAlignments/min using 36 S-W cores on the same FPGA for sequences of 160 x 100 nucleotides.

关键词： Heuristic algorithms Field programmable gate arrays Algorithm design and analysis DNA Bioinformatics Proteins Genomics

来源：评论

学校读者我要写书评

暂无评论

Model-Based Dynamic Scheduling for Multicore implementation of Image processing systems

Model-Based Dynamic Scheduling for Multicore Implementation ...

引用

ieee International workshop on signal processing systems (sips)

作者： Wu, Jiahao Blattner, Timothy Keyrouz, Walid Bhattacharyya, Shuvra S. Univ Maryland College Pk MD 20742 USA NIST Gaithersburg MD 20899 USA Tampere Univ Technol Tampere Finland

ISBN: (纸本)9781538604465

In this paper, we present a new software tool, called HTGS Model-based Engine (HMBE), for the design and implementation of multicore signal processing applications. HMBE provides complementary capabilities to HTGS (Hybrid Task Graph Scheduler), which is a recently-introduced software tool for implementing scalable workflows for high performance computing applications. HMBE integrates advanced design optimization techniques provided in HTGS with model-based approaches that are founded on dataflow principles. Such integration contributes to (a) making the application of HTGS more systematic and less time consuming, (b) incorporating additional dataflow-based optimization capabilities with HTGS optimizations, and (c) automating significant parts of the HTGS-based design process. In this paper, we present HMBE with an emphasis on novel dynamic scheduling techniques that are developed as part of the tool. We demonstrate the utility of HMBE through a case study involving an image stitching application for large scale microscopy images.

关键词： Message systems Adaptation models Computational modeling Processor scheduling Predictive models Dynamic scheduling

来源：评论

学校读者我要写书评

暂无评论

Higher performance and lower power enhancements to VLIW architectures

Higher performance and lower power enhancements to VLIW arch...

引用

ieee workshop on signal processing, systems design and implementation (sips 01)

作者： Gass, W Texas Instruments Inc Dallas TX USA

Architecture enhancements to the C6000 architecture have improved performance, reduced code size, lowered power, and increased compiler efficiency. In this work, benchmarks of DSP kernels and typical DSP applications ... 详细信息

ISBN: (纸本)0780371453

关键词： Digital signal processing

来源：评论

学校读者我要写书评

暂无评论

Efficient protection of the pipeline core for safety-critical processor-based systems

Efficient protection of the pipeline core for safety-critica...

引用

ieee workshop on signal processing systems design and implementations (sips 05)

作者： Touloupis, E Flint, JA Chouliaras, VA Ward, DD Univ Loughborough Dept Elect & Elect Engn Loughborough Leics England

ISBN: (纸本)0780393333

The increasing number of safety-critical commercial applications has generated a need for components with high levels of reliability. As CMOS process sizes continue to shrink, the reliability of ICs is negatively affected since they become more sensitive to transient faults. New circuit designs must take this fact into consideration, and incorporate adequate protection against the effects of transient faults. This paper presents a novel method for protecting the pipelined execution unit of an embedded processor. It is based on a self-configured architecture with hybrid redundancy that can mask single and multiple errors, which can occur on storage elements due to transient or permanent faults. This concept can be easily applied to any processing architecture of this nature with a high safety integrity level. Results from error-injection experiments are also reported that show that this design can maintain a non-interrupted and failure-free operation under single and double errors with a probability that exceeds 99.4%.

关键词： Integrated circuits

来源：评论

学校读者我要写书评

暂无评论

Receiver synthesis for nonlinearly amplified OFDM signal

Receiver synthesis for nonlinearly amplified OFDM signal

引用

ieee workshop on signal processing systems

作者： Zhidkov, SV System-On-Chip R and D Center Samsung Electronics Co. Ltd. South Korea

ISBN: (纸本)0780377958

In this paper receiver synthesis for nonlinearly amplified orthogonal frequency division multiplexing (OFDM) signal is presented. Optimal maximum-likelihood (ML) receiver is proposed and its computational complexity is discussed. Further, sub-optimal receiver suitable for OFDM signals with large number of sub-carriers and high-order constellation is presented. The performance of optimal and sub-optimal receiver for nonlinearly amplified m-QAM-OFDM signal is studied by means of simulation.

关键词： Baseband Constellation diagram Degradation Fast Fourier transforms Interference Nonlinear distortion OFDM signal processing signal synthesis Transmitters

来源：评论

学校读者我要写书评

暂无评论

Intelligent module descriptions in the implementation of software radios

Intelligent module descriptions in the implementation of sof...

引用

ieee Annual workshop on signal processing systems: design and implementation

作者： Mathen, S Evans, J Komp, E Minden, G Univ Kansas Informat & Telecommun Technol Ctr Lawrence KS 66044 USA

ISBN: (纸本)0780364880

This paper explains our experience in applying "higher" levels of abstraction for DSP based designs, Higher levels of abstraction allow us to describe digital radio designs in a more generic fashion, abstracted over carrier frequencies and data rates As such, specific instances of the radios can be compiled from our generic descriptions. In this way, we obtain rapid reconfiguration within a wide range of design specifications.

关键词： Digital radio

来源：评论

学校读者我要写书评

暂无评论

On core and more: A design perspective for system-on-chip

On core and more: A design perspective for system-on-chip

引用

1997 ieee workshop on signal processing systems (sips 97) - design and implementation

作者： Meyr, H RHEIN WESTFAL TH AACHEN RHEIN WESTFAL TH AACHENLAB INTEGRATED SYST SIGNAL PROCAACHENGERMANY

ISBN: (纸本)0780338065

In order to cope with the increasing number of functions that need to be implemented on a single chip as telecommunication products become more complex, a rapid trend towards programmable architectures as a base for digital signal processing (DSP) systems is occurring. The reason for this is that extremely complex algorithms and protocols must be implemented to economically use the available bandwidth for the next generation of wireless networks. The rapidly changing system requirements and design productivity and the intellectual property reuse are also promoting this trend.

关键词： Digital signal processing

来源：评论

学校读者我要写书评

暂无评论

Speedups from partitioning software kernels to FPGA hardware in embedded SoCs

Speedups from partitioning software kernels to FPGA hardware...

引用

ieee workshop on signal processing systems design and implementations (sips 05)

作者： Galanis, MD Dimitroulakos, G Kakarountas, AP Goutis, CE Univ Patras Dept Elect & Comp Engn VLSI Design Lab Patras Greece

ISBN: (纸本)0780393333

This paper presents a hardware/software partitioning methodology for improving performance in single-chip systems comprised by processor and reconfigurable logic. The reconfigurable logic is realized by Field Programmable Gate Array technology. Critical software parts are selected for acceleration on the reconfigurable logic. A generic hybrid System-on-Chip platform, which can model the majority of existing processor-FPGA systems, is considered by the method. The partitioning method uses an automated kernel identification process at the basic-block level for detecting critical software portions. Three different instances of the generic platform and two sets of benchmarks are used in the experiments. The analysis on five real-life applications showed that these applications spend an average of 69% of their instruction count in 11% on average of their code. The extensive experimentation illustrates that for the systems composed by 32-bit processors the speedup of five applications ranges from 1.3 to 3.7 relative to an all software solution. For a platform composed by an 8-bit processor, the performance gains of eight DSP algorithms are considerably greater, since the average speedup equals 28.

关键词： Embedded systems

来源：评论

学校读者我要写书评

暂无评论

Efficient fault-tolerant arithmetic using a Symmetrical modulus replication RNS

Efficient fault-tolerant arithmetic using a Symmetrical modu...

引用

ieee workshop on signal processing, systems design and implementation (sips 01)

作者： Imbert, L Jullien, GA Univ Calgary ATIPS Lab Dept Elect & Comp Engn Calgary AB T2N 1N4 Canada

In this paper we investigate efficiencies that may be Introduced into the fault-tolerant MRRNS system by restricting the data sample polynomials to be even. We refer to this as the Symmetrical MRRNS (SMRRNS) technique.

ISBN: (纸本)0780371453

关键词： Digital signal processing

来源：评论

学校读者我要写书评

暂无评论

SS-design: Dataflow-Based design of Coarse-Grained Reconfigurable Platforms

SS-Design: Dataflow-Based Design of Coarse-Grained Reconfigu...

引用

ieee International workshop on signal processing systems (sips)

作者： Palumbo, Francesca Sau, Carlo Fanni, Tiziana Meloni, Paolo Raffo, Luigi Univ Sassari PolComIng I-07100 Sassari Italy Univ Cagliari DIEE I-09124 Cagliari Italy

ISBN: (纸本)9781509033614

The coarse-grained reconfigurable design paradigm provides, in a wide scope of design cases, effective support for adaptability, as required in modern embedded systems. The Reconfigurable Platform Composer Tool (RPCT) project and its main outcome, the Multi-Dataflow Composer, aim at reducing the effort related with the design, mapping, optimization and prototyping of coarse-grained reconfigurable systems.

关键词： Embedded systems

来源：评论

学校读者我要写书评

暂无评论

没有更多数据了...

全选清除本页清除全部题录导出标记到“检索档案”

共115页 << < 3 4 5 6 7 8 9 10 11 12 > >>

检索报告对象比较合并检索0

隐藏清空

合并搜索

回到顶部

执行限定条件

内容：

评分：

请选择保存的检索档案：

请选择收藏分类：

订阅名称：

通借通还

温馨提示：

图书名称：

借书校区：

取书校区：

手机号码：

邮箱地址：

一卡通帐号：

电话和邮箱必须正确填写，我们会与您联系确认。

联系人：

所在院系：

联系邮箱：

联系电话：

内蒙古自治区呼和浩特市赛罕区大学西街235号邮编: 010021

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：