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IEEE International Conference on RFID

作者： Daniel Arnitz Ulrich Muehlmann Thomas Gigl Klaus Witrisal Signal Processing and Speech Communication Laboratory Graz University of Technology Graz Austria NXP Semiconductors Gratkorn Austria

ISBN: (纸本)9781424433377

A chip manufacturing process requires extensive support of CAD-tools in order to predict the behavior of the embedded circuitry and to ensure the intended system functionality. Past experience shows that the overall performance of UHF RFID systems is mainly limited by multipath propagation and detuning. In this context, system-level simulations are vital to assess the overall performance and improve the embedded circuit. We present a simulator framework capable of handling chip-level tag models, fading MIMO radio channels, and interrogator building blocks on signal level. It is based on highly flexible behavioral tag-models instead of highly accurate but static ASIC models. In contrast to other UHF RFID simulators, it is explicitly designed to handle wideband signals, fading channels, nonlinearities, and detuning effects. The simulator is currently used to develop and evaluate the performance of ranging and realtime channel estimation systems. The presented results emphasize the feasibility of our framework in the evaluation of a range estimation approach between a standard UHF RFID transponder and an interrogator.

关键词： Wideband Radiofrequency identification Passive RFID tags Circuit simulation Fading Manufacturing processes UHF propagation Context modeling MIMO Application specific integrated circuits

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Enabling High-Productivity SIP Application Development: modeling and simulation of Superconducting Quantum Interference Filters

Enabling High-Productivity SIP Application Development: Mode...

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DoD High performance Computing Modernization Program Users Group

作者： Juan C. Chaves Alan Chalker David Hudak Vijay Gadepally Fernando Escobar Patrick Longhini Ohio Supercomputer Center Columbus OH USA SPAWAR Systems Center PACIFIC SSC Pacific San Diego CA USA

The inherent complexity in utilizing and programming high performance computing (HPC) systems is the main obstacle to widespread exploitation of HPC resources and technologies in the Department of Defense (DoD). Consequently, there is the persistent need to simplify the programming interface for the generic user. This need is particularly acute in the signal/image processing (SIP), Integrated modeling and Test Environments (IMT), and related DoD communities where typical users have heterogeneous unconsolidated needs. Mastering the complexity of traditional programming tools (C, MPI, etc.) is often seen as a diversion of energy that could be applied to the study of the given scientific domain. Many SIP users instead prefer high-level languages (HLLs) within integrated development environments, such as MATLAB. We report on our collaborative effort to use a HLL distribution for HPC systems called ParaM to optimize and parallelize a compute-intensive Superconducting Quantum Interference Filter (SQIF) application provided by the Navy SPAWAR systems Center in San Diego, CA. ParaM is an open-source HLL distribution developed at the Ohio Supercomputer Center (OSC), and includes support for processor architectures not supported by MATLAB (e.g., Itanium and POWER5) as well as support for high-speed interconnects (e.g., InfiniBand and Myrinet). We make use of ParaM installations available at the Army Research Laboratory (ARL) DoD Supercomputing Resource Center (DSRC) and OSC to perform a successful optimization/parallelization of the SQIF application. This optimization/parallelization may be used to assess the feasibility of using SQIF devices as extremely sensitive detectors for electromagnetic radiation which is of great importance to the Navy and DoD in general.

关键词： MATLAB US Department of Defense Computer languages SQUIDs Programming Optimization Message passing

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Perceptual color descriptor based on a spatial distribution model: Proximity histograms

Perceptual color descriptor based on a spatial distribution ...

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IEEE International Conference on Multimedia Computing and systems (ICMCS)

作者： Moncef Gabbouj Murat Birinci Serkan Kiranyaz Institute of Signal Processing Tampere University of Technology Tampere Finland

Color is the main source of information particularly for content-analysis and retrieval. Most of the color descriptors, however, show severe limitations and drawbacks due to their incapability of modeling the human color perception. Moreover, they cannot characterize all the properties of the color composition in visual scenery. In this paper we present a perceptual color feature, which describes all major properties of prominent colors both in spatial and color domain. In accordance with the well-known Gestalt law, we adopt a top-down approach in order to model (see) the whole color composition before its parts and in this way we can avoid the problems of pixel-based approaches. In color domain the dominant colors are extracted along with their global properties and quad-tree decomposition partitions the image so as to characterize the spatial color distribution (SCD). The proposed color model distills the histogram of inter-color distances. Combination of the extracted global and spatial properties forms the final descriptor, which is neither biased nor become noisy from the presence of such color elements that cannot be perceived in both spatial and color domains. Finally a penalty-trio model fuses all color properties in a similarity distance computation during retrieval. Experimental results approve the superiority of the proposed technique against well-known global and spatial descriptors.

关键词： Histograms Humans Colored noise Information retrieval Color Content based retrieval image retrieval Distributed control Multimedia databases performance evaluation

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Memory-constrained block processing for DSP software optimization

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JOURNAL OF signal processing systems FOR signal image AND VIDEO TECHNOLOGY 2008年第2期50卷 163-177页

作者： Ko, Ming-Yung Shen, Chung-Ching Bhattacharyya, Shuvra S. Sandbridge Technol Inc White Plains NY USA Univ Maryland Dept Elect & Comp Engn College Pk MD 20742 USA

Digital signal processing (DSP) applications involve processing long streams of input data. It is important to take into account this form of processing when implementing embedded software for DSP systems. Task-level vectorization, or block processing, is a useful dataflow graph transformation that can significantly improve execution performance by allowing subsequences of data items to be processed through individual task invocations. In this way, several benefits can be obtained, including reduced context switch overhead, increased memory locality, improved utilization of processor pipelines, and use of more efficient DSP oriented addressing modes. On the other hand, block processing generally results in increased memory requirements since it effectively increases the sizes of the input and output values associated with processing tasks. In this paper, we investigate the memory-performance trade-off associated with block processing. We develop novel block processing algorithms that carefully take into account memory constraints to achieve efficient block processing configurations within given memory space limitations. Our experimental results indicate that these methods derive optimal memory-constrained block processing solutions most of the time. We demonstrate the advantages of our block processing techniques on practical kernel functions and applications in the DSP domain.

关键词： block processing dataflow embedded systems vectorization block diagram compiler activation overhead context switch memory management

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Spatial adaptive Bayesian wavelet threshold exploiting scale and space consistency

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MULTIDIMENSIONAL systems AND signal processing 2008年第1期19卷 157-170页

作者： Chen, Ying Ji, Zhicheng Hua, Chunjian So Yangtze Univ Sch Commun & Control Engn Res Ctr Control Sci & Engn Wuxi 214122 Peoples R China So Yangtze Univ Sch Mech Engn Wuxi 214122 Peoples R China

Threshold selection is critical in image denoising via wavelet shrinkage. Many powerful approaches have been investigated, but few of them are adaptive to the changing statistics of each subband and meanwhile keep efficiency of the algorithm. In this work, an inter-scale adaptive, data-driven threshold for image denoising via wavelet soft-thresholding is proposed. To get the optimal threshold, a Bayesian estimator is applied to the wavelet coefficients. The threshold is based on the accurate modeling of the distribution of wavelet coefficients using generalized Gaussian distribution (GGD), and the near exponential prior of the wavelet coefficients across scales. The new approach outperforms BayesShrink because it captures the statistical inter-scale property of wavelet coefficients, and is more adaptive to the data of each subband. The simplicity of the proposed threshold makes it easy to achieve the spatial adaptivity, which will further improves the wavelet denoising performance. simulation results show that higher peak-signal-to-noise ratio can be obtained than other thresholding methods for image denoising.

关键词： image denoising wavelet transform statistical modeling adaptive thresholding

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modeling multicore distributed systems and evaluation of performance, power, and predictability using visualsim

Modeling multicore distributed systems and evaluation of per...

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Huntsville simulation Conference, HSC 2008

作者： Asaduzzaman, Abu Rani, Manira Koivisto, Darryl Department of Computer Sci. and Engineering Florida Atlantic University 777 Glades Road SU80-118S Boca Raton FL 33431 United States Architecture Modeling Group Mirabilis Design Inc. 3000 Scott Blvd Santa Clara CA 95054 United States

There are significant changes in the design process of modern computing systems in order to fulfill the needs for higher computing performance. New generation multicore designs have shown in general that two cores running at one half of the frequency can approach the performance of a single core running at frequency, while the dual core power consumption is less. However, parallel thread execution to support real-time signal/image processing becomes an enormous challenge as it relates to cache sharing to achieve the best overall performance. Several techniques including cache locking show promises to improve predictability and performance for negligible additional energy. In this work, we model a distributed system with multiple cores where level-1 cache is privet to each core and level-2 cache is shared. Using VisualSim, we develop a simulation platform to apply level-1 and level-2 cache locking on the modeled architecture. Experimental results show that the execution time predictability of applications running on distributed systems can be improved with zero or little impact on performance/power ratio by using a cache locking mechanism added to the existing cache sharing structure. We find this technique efficient, flexible, and promising to model and simulate multicore distributed systems for performance, power, and predictability evaluation.

关键词： Software architecture

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performance and energy consumption improvements in microprocessor systems utilizing a coprocessor data-path

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JOURNAL OF signal processing systems FOR signal image AND VIDEO TECHNOLOGY 2008年第2期50卷 179-200页

作者： Galanis, Michalis D. Dimitroulakos, Gregory Goutis, Costas E. Univ Patras ECE Dept VLSI Design Lab Patras 26500 Achaia Greece

The speedups and the energy reductions achieved in a generic single-chip microprocessor system by employing a high-performance data-path are presented. The data-path acts as a coprocessor that accelerates computational intensive kernel sections thereby increasing the overall performance. The authors have previously introduced the data-path which is composed by flexible computational components (FCCs). These components can realize any two-level sequence of primitive operations. The automated coprocessor synthesis method from high-level software description and its integration to a design flow for executing applications on the system is presented. The overall application speedups of eleven real-life applications, relative to the software execution on the microprocessor, are estimated using the design flow. These speedups are close to theoretical bounds and range from 1.78 to 5.84, having an average value of 3.04, while the overhead in circuit area is small. The energy savings range from 41 to 74%, while the reduction in the application energy-delay product has an average value of 80%. A comparison with another high-performance data-path showed that the proposed coprocessor achieves better performance, consumes less energy and has smaller area-time products for the generated data-paths. Additionally, the FCC data-path achieves better performance in accelerating kernels relative to a VLIW DSP core.

关键词： performance improvements energy reductions coprocessor data-path architectural synthesis design flow template units kernels

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performance evaluation of Multi-hop Detect-and-Forward and Amplify-and-Forward Wireless Transmission systems

Performance Evaluation of Multi-hop Detect-and-Forward and A...

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19th IEEE International Symposium on Personal, Indoor and Mobile Radio Communications

作者： Vazifehdan, Javad Hekmat, Ramin Delft Univ Technol Fac Elect Engn Math & Comp Sci Delft Netherlands

ISBN: (纸本)9781424426430

In this paper we propose a new scheme for multi-hop forwarding in wireless networks. This new scheme is based on detection and forwarding of the received messages at the physical layer, without further processing at the higher layers. We derive a new expression for the symbol error rate in this proposed multi-hop Detect-and-Forward network by modeling the transmission line as a Markov Chain. The derived expression is quite general with respect to the (de) modulation scheme and the channel model. We compare the error rate performance of the proposed multi-hop Detect-and-Forward scheme with the earlier in the literature proposed multi-hop Amplify and Forward scheme. For the case of slow-varying flat-fading Rayleigh channels, our analytical and simulation results show that these two systems have surprisingly close performance at a wide range of signal to noise ratios.

关键词： detect-and-forward amplify-and-forward multi-hop wireless networks

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Experimental performance evaluation of error estimation and compensation technique for quadrature modulators and demodulators

Experimental performance evaluation of error estimation and ...

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IEEE Radio and Wireless Symposium

作者： Yamaoka, Atsushi Yamaguchi, Keiichi Seto, Ichiro Toshiba Co Ltd Corp Res & Dev Ctr Kanagawa 2128582 Japan

ISBN: (纸本)9781424414628

In recent mobile communication systems, impairments in analog circuits cannot be disregarded owing to the need to achieve high performance. Errors in analog circuits consist of a distortion of a power amplifier(PA), gain and phase imbalance in a quadrature modulator(QMOD) and a quadrature demodulator(QDEMOD), dc offset, frequency offset, and so on. Because of high accuracy of compensation, many techniques of error compensation by using digital signal processing have been studied recently. Digital predistorter(DPD), which can eliminate odd-order distortion caused by PA nonlinearity, is one of the compensation techniques. However, in the case that direct conversion architecture is used in a loop-back path, errors in a QMOD and a QDEMOD affect the performance of DPD. Previously, we proposed an error estimation technique for a QMOD and a QDEMDO by using a variable phase shifter and evaluated the performance through computer simulation. In this paper, we evaluate the performance through an experiment by image rejection ratio(IRR) and error vector magnitude(EVM) in the case that the output of a QMOD is directly connected to the input of a QDEMOD. The results show that IRR improvement after compensation is 10dB at the output of the QMOD and EVM improvement after compensation is 10dB at the output of the QMOD and 20dB at the output of the QDEMOD.

关键词： quadrature modulators quadrature demodulators error estimation error compensation phase shifters

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Sea and ground radar clutter modeling

Sea and ground radar clutter modeling

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IEEE National Conference on Radar

作者： Maurice W. Long Maria S. Greco Private Consultant USA University of Pisa Italy

The modeling of the clutter echoes is a central issue for the design and performance evaluation of radar systems. The aim of this paper is to describe the state-of-the-art approaches to the modeling and understanding of land and sea clutter echoes and their implications on performance prediction and signal processors design. The tutorial is mainly divided in 5 parts: (i) Radar sea and ground clutter phenomena, measurements and measurement limitations, at high and low resolution, high and low grazing angles. (ii) Statistical and spectral models for windblown vegetation and sea surfaces. (iii) Experimental validation of statistical and spectral models, for both sea and land clutter, using recorded data sets. (iv) Impact of the clutter models on radar performance for detection and imaging, there including the effect on CFAR techniques and high resolution SAR imaging. (v) Radar clutter simulation for radar performance evaluation.

关键词： Radar clutter Radar measurements Sea measurements image resolution Radar imaging Predictive models signal processing Process design signal design signal resolution

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