In next generation video surveillance systems there is a trend towards embedded solutions. Digital signal processors (DSP) are often used to provide the necessary computing power. The limited resources impose signific...
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In next generation video surveillance systems there is a trend towards embedded solutions. Digital signal processors (DSP) are often used to provide the necessary computing power. The limited resources impose significant challenges for software development. Resource constraints must be met while facing increasing application complexity and pressing time-to-market demands. Recent advances in synthesis tools for Simulink suggest a high-level approach to algorithm implementation for embedded DSP systems. The model-based visual development process of Simulink facilitates simulation as well as synthesis of target specific code. In this work the modeling and code generation capabilities of Simulink are evaluated with respect to video analysis algorithms. Different models of a motion detection algorithm are used to synthesize code. The generated code targeted at a Texas Instruments TMS320C6416 DSP is compared to a hand-optimized reference. Experiments show that an ad hoc approach to synthesize complex imageprocessing algorithms hardly yields optimal code for DSPs. However, several optimizations can be applied to improve performance.
Auto-parallelizing compilers for embedded applications have been unsuccessful due to the widespread use of pointer arithmetic and the complex memory model of multiple-address space digital signal processors (DSPs). Th...
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Auto-parallelizing compilers for embedded applications have been unsuccessful due to the widespread use of pointer arithmetic and the complex memory model of multiple-address space digital signal processors (DSPs). This paper develops, for the first time, a complete auto-parallelization approach, which overcomes these issues. It first combines a pointer conversion technique with a new modulo elimination transformation for program recovery enabling later parallelization stages. Next, it integrates a novel data transformation technique that exposes the processor location of partitioned data. When this is combined with a new address resolution mechanism, it generates efficient programs that run on multiple address spaces without using message passing. Furthermore, as DSPs do not possess any data cache structure, an optimization is presented which transforms the program to both exploit remote data locality and local memory bandwidth. This parallelization approach is applied to the DSPstone and UTDSP benchmark suites, giving an average speedup of 3.78 on four Analog Devices TigerSHARC TS-101 processors.
This paper describes a new data collection system for determining individual vehicle routes from images detector sequence. These sensing technologies are installed at the traffic signal to gain a microscopic flow from...
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ISBN:
(纸本)3540244778
This paper describes a new data collection system for determining individual vehicle routes from images detector sequence. These sensing technologies are installed at the traffic signal to gain a microscopic flow from upstream intersection. From the investigation, the techniques for analyzing the images can be applied for calculation of the traffic information. The image sensors are set for microscopic detection via the direction of vehicles, and for every lane at specified perception range. Two cases study has been carried out to analyze the method. We try to solve the problem of signal control system for the FAST system and complex intersection. Using image sensor for (i) control traffic flow in FAST system, (h) manage the control system in complicated intersection, is highly proposed. Arena simulations are used to analysis the investigation data and monitoring the traffic signal control system performance.
The proceedings contain 95 papers. The topics discussed include: combining K-means and Semivariograms-based grid clustering;real-time colour segmentation and autofocus in retinal images;reconstruction of 3-D image fro...
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The proceedings contain 95 papers. The topics discussed include: combining K-means and Semivariograms-based grid clustering;real-time colour segmentation and autofocus in retinal images;reconstruction of 3-D image from stereo pictures;content-based video recognition technique using a non linear metric;threshold procedures and image segmentation;improved signal reconstruction and return channel suppression in distributed video coding systems;modulus maximum image energy using maximum entropy;telecine calibration and image quality evaluation;digital cinema projectors;wavelet transform in image recognition;wavelet downsampling in image compression;dual detection of watermarks embedded in the DCT domain;remote control and measurement of temperature over the web;data encryption performance based on blowfish;and semantic based video data modeling.
The increasing of computational power requirements for DSP and Multimedia application and the needs of easy-to-program development environment has driven recent programmable devices toward Very Long Instruction Word (...
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The increasing of computational power requirements for DSP and Multimedia application and the needs of easy-to-program development environment has driven recent programmable devices toward Very Long Instruction Word (VLIW) [1] architectures and Hw-Sw co-design environments [2]. VLIW architecture allows generating optimized machine code from high-level languages exploiting Instruction Level Parallelism (ILP) [3]. Furthermore, applications requirements and time to market constraints are growing dramatically moving functionalities toward System on Chip (SoC) direction. This paper presents VLIW-SIM, an Application-Driven Architecture-design approach based on Instruction Set simulation. VLIW architectures and Instruction Set simulation were chosen to fulfill multimedia domain requirements and to implement an efficient Hw-Sw co-design environment. The VLIW-SIM simulation technology is based on pipeline status modeling, simulation cache and simulation Oriented Hw description. An effective support for Hw-Sw co-design requires high simulationperformance (in terms of Simulated Instruction per Second-SIPS), flexibility (the ability to represent a number of different architectures) and cycle accuracy. There is a strong trade-off between these features: cycle accurate or close to cycle accurate simulation have usually low performance [4, 5]. Good simulationperformance can be obtained loosing the simulator flexibility. Moreover SoC simulation requires a further degree of flexibility in simulating different components (core, co-processors, memories, buses). The proposed approach is focused on interpretative (not compiled [6]) re-configurable Instruction Set Simulator (ISS) in order to support both application design and architecture exploration. VLIW-SIM main features are: efficient host resource allocation, Instruction Set and Architecture description Flexibility (Instruction Set Dynamic Generation and simulation Oriented Hardware Description), Step by step pipeline status trac
Radar seeker is a key part of the tactical guided missile of active homing type. It detects a target and guides a missile to fly at it, so its performance affects missile's efficiency greatly. Active radar seeker ...
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Radar seeker is a key part of the tactical guided missile of active homing type. It detects a target and guides a missile to fly at it, so its performance affects missile's efficiency greatly. Active radar seeker mostly adopts pulse Doppler monopulse radar system. So it is significant to research on the modeling and simulation of this kind of radar seeker. The classical simulation of radar seeker primarily model guidance control system without considering signal receiving and signalprocessing. Based on the simulation and evaluation problem of active radar target seeker in the condition of complicated ECM, modeling and dynamic simulation of pulsed Doppler radar seeker is studied. Then simulation is carried out and results verify its efficiency.
Digital waveguide networks (DWN) are known as a methodology to simulate spatially distributed systems, such as reverberators (room simulation) and resonators of musical instruments. This paper is an overview and study...
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ISBN:
(纸本)9781604234848
Digital waveguide networks (DWN) are known as a methodology to simulate spatially distributed systems, such as reverberators (room simulation) and resonators of musical instruments. This paper is an overview and study on the application of DWNs to simulate acoustic spaces for room rendering, including auralization. The methods discussed combine the principles of digital waveguide meshes, image source models, reverberation algorithms, and HRTF-based rendering. Examples are given on synthesizing room responses for simple room geometries, and the possibilities of fitting the models to real room responses are discussed. System performance is discussed from the point of view of real-time virtual acoustics.
This paper discusses the proven concept of marrying the computing capabilities of a cluster computer with the reconfigurability of adaptive computing systems into a 48 node heterogeneous high performance computer (HHP...
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Modern airborne radars have stringent clutter-limited performance requirements and have become increasingly more complex and less tractable for mathematical analysis. Moreover, the performanceevaluation associated wi...
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