检索结果-内蒙古大学图书馆

25th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for embedded systems (LCTES)

作者： Raffeck, Phillip Maier, Johannes Waegemann, Peter FAU Erlangen Nurnberg Erlangen Germany

ISBN: (纸本)9798400706165

embedded systems with intermittent energy supply can revolutionize the Internet of Things, as they are energy self-sufficient due to energy harvesting. Existing intermittent-computing approaches, running directly from non-volatile memory, allow incremental progress of machine-code instructions. However, this progress does not apply to many devices (e.g., transceivers) having transactional (i.e., all-or-nothing) semantics: Power failures during transactions lead to starvation when frequently experiencing failed attempts. We introduce WoCA, an approach that exploits static, whole-system worst-case analysis for device-driven intermittent computing. With the currently available energy, WoCA enables transactional device uses and guarantees forward progress. WoCA's novel static analysis tracks program-path-sensitive device states and transitions to yield energy bounds. With these bounds, WoCA's runtime decides when to safely execute code between checkpoints. Using WoCA's hardware platform, we validate that WoCA makes more efficient use of available energy compared to worst-case-agnostic approaches, while also giving runtime guarantees.

关键词： static analysis intermittent systems worst-case energy consumption (WCEC) energy constraints devices

来源：评论

学校读者我要写书评

暂无评论

Label-Specific Multilabel Feature Selection Based on Fuzzy Implication Granularity Information

引用

IEEE transactions ON FUZZY systems 2025年第3期33卷 959-970页

作者： Li, Yangding Xie, Hao Dai, Jianhua Hunan Normal Univ Coll Informat Sci & Engn Hunan Prov Key Lab Intelligent Comp & Language Inf Changsha 410081 Peoples R China Hunan Normal Univ Sch Math & Stat Key Lab Comp & Stochast Math Minist Educ Changsha 410081 Peoples R China

In recent years, multilabel feature selection (MFS) has gained considerable attention as a key technique in the field of data mining. embedded methods have been widely adopted due to their simplicity and efficiency. However, most embedded MFS methods assume that all labels share the same feature space. Although previous works have noted this issue and proposed solutions, they still suffer from the inability to accurately identify a specific subset of features for each label. Furthermore, most embedded MFS methods often only consider feature similarity through manifold learning concepts, neglecting the impact of feature redundancy, leading to suboptimal performance. In addition, their weight matrix is usually derived from a single perspective of the loss function. To address these limitations, we propose a novel embedded label-specific MFS method based on fuzzy implication granularity information called LSFSFI. This method uses the partial fuzzy mutual implication granularity information to capture the relationships between labels and features, and introduces an auxiliary matrix to achieve label-specific feature selection, which provides a new perspective for the calculation of the weight matrix. In addition, the normalized fuzzy mutual implication granularity information is used to describe the redundancy between features, and a new redundancy constraint regularization term is proposed to ensure a more reasonable assignment of feature weights. Experimental results on several multilabel datasets show that LSFSFI outperforms existing methods in terms of both performance and practicality.

关键词： Redundancy Fuzzy systems Feature extraction Correlation Time complexity Manifold learning Data mining Vectors Technological innovation Stochastic processes Fuzzy implication granularity information fuzzy rough set granular computing label-specific multi-label feature selection (MFS) redundancy constraint regularization

来源：评论

学校读者我要写书评

暂无评论

AxOMaP: Designing FPGA-based Approximate Arithmetic Operators using Mathematical Programming

引用

ACM transactions ON RECONFIGURABLE TECHNOLOGY AND systems 2024年第2期17卷 1-28页

作者： Sahoo, Siva Satyendra Ullah, Salim Kumar, Akash Imec 1 Interunivers Microelect Ctr IMEC Kapeldreef 75 B-3001 Leuven Belgium Tech Univ Dresden Chair Processor Design Cfaed D-01062 Dresden Germany

With the increasing application of machine learning (ML) algorithms in embedded systems, there is a rising necessity to design low-cost computer arithmetic for these resource-constrained systems. As a result, emerging models of computation, such as approximate and stochastic computing, that leverage the inherent error-resilience of such algorithms are being actively explored for implementing ML inference on resourceconstrained systems. Approximate computing (AxC) aims to provide disproportionate gains in the power, performance, and area (PPA) of an application by allowing some level of reduction in its behavioral accuracy (BEHAV). Using approximate operators (AxOs) for computer arithmetic forms one of the more prevalent methods of implementing AxC. AxOs provide the additional scope for finer granularity of optimization, compared to only precision scaling of computer arithmetic. To this end, the design of platform-specific and cost-efficient approximate operators forms an important research goal. Recently, multiple works have reported the use of AI/ML-based approaches for synthesizing novel FPGA-based AxOs. However, most of such works limit the use of AI/ML to designing ML-based surrogate functions that are used during iterative optimization processes. To this end, we propose a novel data analysis-driven mathematical programming-based approach to synthesizing approximate operators for FPGAs. Specifically, we formulate mixed integer quadratically constrained programs based on the results of correlation analysis of the characterization data and use the solutions to enable a more directed search approach for evolutionary optimization algorithms. Compared to traditional evolutionary algorithms-based optimization, we report up to 21% improvement in the hypervolume, for joint optimization of PPA and BEHAV, in the design of signed 8-bit multipliers. Further, we report up to 27% better hypervolume than other state-of-the-art approaches to DSE for FPGA-based application-speci

关键词： Approximate computing arithmetic operator design circuit synthesis AI-based exploration

来源：评论

学校读者我要写书评

暂无评论

STDF: Spatio-Temporal Deformable Fusion for Video Quality Enhancement on embedded Platforms

引用

ACM transactions on embedded computing systems 2024年第2期23卷 1-25页

作者： Deng, Jianing Dong, Shunjie Chen, Lvcheng Hu, Jingtong Zhuo, Cheng Univ Pittsburgh Pittsburgh PA USA Shanghai Jiao Tong Univ Ruijin Hosp Dept Radiol Sch Med Shanghai Peoples R China Shanghai Jiao Tong Univ Coll Hlth Sci & Technol Sch Med Shanghai Peoples R China Zhejiang Univ Hangzhou Zhejiang Peoples R China

With the development of embedded systems and deep learning, it is feasible to combine them for offering various and convenient human-centered services, which is based on high-quality (HQ) videos. However, due to the limit of video traffic load and unavoidable noise, the visual quality of an image from an edge camera may degrade significantly, influencing the overall video and service quality. To maintain video stability, video quality enhancement (QE), aiming at recovering HQ videos from their distorted low-quality (LQ) sources, has aroused increasing attention in recent years. The key challenge for video QE lies in how to effectively aggregate complementary information from multiple frames (i.e., temporal fusion). To handle diverse motion in videos, existing methods commonly apply motion compensation before the temporal fusion. However, the motion field estimated from the distorted LQ video tends to be inaccurate and unreliable, thereby resulting in ineffective fusion and restoration. In addition, motion estimation for consecutive frames is generally conducted in a pairwise manner, which leads to expensive and inefficient computation. In this article, we propose a fast yet effective temporal fusion scheme for video QE by incorporating a novel Spatio-Temporal Deformable Convolution (STDC) to simultaneously compensate motion and aggregate temporal information. Specifically, the proposed temporal fusion scheme takes a target frame along with its adjacent reference frames as input to jointly estimate an offset field to deform the spatio-temporal sampling positions of convolution. As a result, complementary information from multiple frames can be fused within the STDC operation in one forward pass. Extensive experimental results on three benchmark datasets show that our method performs favorably to the state of the art in terms of accuracy and efficiency.

关键词： Video restoration quality enhancement embedded systems deep neural network

来源：评论

学校读者我要写书评

暂无评论

Toward Efficient System-on-Module for Design-Space Exploration of Analog Spiking Neural Networks

引用

IEEE transactions ON CIRCUITS AND systems I-REGULAR PAPERS 2024年第8期71卷 3538-3549页

作者： El-Masry, Moamen Werner, Thilo Zjajo, Amir Weigel, Robert Infineon Technol AG D-85579 Neubiberg Germany Friedrich Alexander Univ Erlangen Nuremberg Inst Elect Engn D-91054 Erlangen Germany Ferroelect Memory Co GmbH D-01099 Dresden Germany Innatera Nanosyst BV NL-2289 EX Rijswijk Netherlands

In this paper, we present an integrated system-on-module for design-space exploration of neurosynaptic behavior in non-volatile memory enhanced spiking neural networks. The system operates in locally-analog, globally-digital modus, facilitating the exploration and validation of both, individual computational components, and the characteristic spike-based features of neurosynaptic arrays. The key advantage of the system lies in its reconfigurable, adaptable, and interchangeable components, which enable precise and reproducible firing patterns. By leveraging these capabilities, various aspects of neurosynaptic behavior can be examined and manipulated. To enhance the weight retention mechanism, the platform incorporates embedded resistive-RAM, ensuring the preservation of synaptic weights. This integration further supports the accurate representation and processing of synaptic information. Experimental results in 28 nm CMOS technology demonstrate the feasibility and effectiveness of the proposed methodology in characterizing spiking neural network components.

关键词： Nonvolatile memory Random access memory Reliability Artificial intelligence Resistance Neurons Synapses Brain-inspired computing neuromorphic VLSI design spiking neural networks system-on-module non-volatile memory resistive-RAM near-memory computing

来源：评论

学校读者我要写书评

暂无评论

DaCapo: An On-Device Learning Scheme for Memory-Constrained embedded systems

引用

ACM transactions on embedded computing systems 2023年第5期22卷 1-23页

作者： Khan, Osama Park, Gwanjong Seo, Euiseong Sungkyunkwan Univ Corp Collaborat Ctr 2066 Seobu Ro Suwon 16419 Gyeonggi Do South Korea

The use of deep neural network (DNN) applications in microcontroller unit (MCU) embedded systems is getting popular. However, the DNN models in such systems frequently suffer from accuracy loss due to the dataset shift problem. On-device learning resolves this problem by updating the model parameters on-site with the real-world data, thus localizing the model to its surroundings. However, the backpropagation step during on-device learning requires the output of every layer computed during the forward pass to be stored in memory. This is usually infeasible in MCU devices as they are equipped only with a few KBs of SRAM. Given their energy limitation and the timeliness requirements, using flash memory to store the output of every layer is not practical either. Although there have been proposed a few research results to enable on-device learning under stringent memory conditions, they require the modification of the target models or the use of non-conventional gradient computation strategies. This paper proposes DaCapo, a backpropagation scheme that enables on-device learning in memory-constrained embedded systems. DaCapo stores only the output of certain layers, known as checkpoints, in SRAM, and discards the others. The discarded outputs are recomputed during backpropagation from the nearest checkpoint in front of them. In order to minimize the recomputation occurrences, DaCapo optimally plans the checkpoints to be stored in the SRAM area at a particular phase of the backpropagation and thus replaces the checkpoints stored in memory as the backpropagation progresses. We implemented the proposed scheme in an STM32F429ZI board and evaluated it with five representative DNN models. Our evaluation showed that DaCapo improved backpropagation time by up to 22% and saved energy consumption by up to 28% in comparison to AIfES, a machine learning platform optimized for MCU devices. In addition, our proposed approach enabled the training of MobileNet, which the MCU device had b

关键词： On-device learning embedded systems backpropagation machine learning Internet-of-Things

来源：评论

学校读者我要写书评

暂无评论

A Lightweight PUF-Based Weights Obfuscation Technique for Secure In-Memory AI Inference

引用

IEEE transactions ON CIRCUITS AND systems I-REGULAR PAPERS 2025年

作者： Parrini, Luca Kar, Anirban Hettwer, Benjamin Soliman, Taha Chauhan, Yogesh Singh Amrouch, Hussam Wehn, Norbert Robert Bosch GmbH Bosch Corp Res D-71272 Renningen Germany Tech Univ Munich Munich Inst Robot & Machine Intelligence Chair Processor Design TUM Sch Computat Informat & Technol D-80333 Munich Germany Indian Inst Technol Kanpur Kanpur 208016 India RPTU Kaiserslautern Landau Dept Elect Engn & Informat Technol Microelect Syst Design Res Grp D-67663 Kaiserslautern Germany

In-Memory computing (IMC) has introduced a novel computational approach that substantially improves emerging embedded AI accelerators' latency and power consumption efficiency. Despite the numerous advantages, IMC architectures also introduce new security vulnerabilities that may compromise the confidentiality of the deployed Neural Network (NN) algorithms. In this work, following an analysis of the potential threats, we present a novel lightweight security countermeasure for IMC accelerators. This methodology can be employed to de-obfuscate the pre-trained weights of NN architectures whose bits' significance has been reordered prior to the deployment phase onto the IMC crossbar. The proposed solution is based on the coordinated action of a Ferroelectric Field-Effect Transistor (FeFET) based Physical Unclonable Function (PUF) design and shifting registers. These components perform custom arithmetic shift operations on the values calculated by the IMC device at runtime to obtain a coherent inference computation. Furthermore, a design-space exploration method is proposed to investigate the trade-off between area overhead and the level of security provided by the implementation. The results show that with less than 3% of area overhead our design is robust against all the tested attack strategies.

关键词： Computer architecture FeFETs Programming Mathematical models Artificial neural networks Transistors Threshold voltage Runtime Nonvolatile memory Kernel In-memory computing PUF FeFET hardware security AI embedded accelerators

来源：评论

学校读者我要写书评

暂无评论

Toward an Analysis Method of Software Evolution Triggered by Place Change in Mobile computing

引用

IEEE transactions ON RELIABILITY 2023年第2期72卷 527-541页

作者： Lu, Chao-Ze Zeng, Guo-Sun Tongji Univ Dept Comp Sci & Technol Key Lab Embedded Syst & Serv Comp Minist Educ Shanghai 201804 Peoples R China Ningbo Univ Technol Sch Cyber Sci & Engn Ningbo 315211 Peoples R China Tongji Univ Project Off Natl Seabed Sci Observat Syst Shanghai 201804 Peoples R China

Software dynamic evolution is a hot topic in software engineering. Traditional evolution is caused by the change in user requirements and running environments. However, in mobile computing systems, there is a new problem that place change leads to the change in software configuration, deployment, and function, which is called the problem of software evolution triggered by place change. Facing this new problem, traditional evolution methods fail to formally describe their evolution process and analyze their evolution performance. Therefore, a new method needs to be developed to ensure the reliability of software evolution triggered by place change. We first address various situations regarding the change of the software function caused by place change in physical space, which are described by a Bigraph model. Then, the triggering conditions for software evolution are defined, and a reaction system corresponding to software evolution is discussed. A theory about software function change caused by place change is developed, including a novel algorithm for identifying software evolution rules that involve place information and the control process for the whole software evolution (CPSE) in a mobile computing environment. Finally, some real case studies illustrate the effectiveness and correctness of our proposed method. Extensive experiments show that our algorithm CPSE outperforms Quiescence and version consistency (VC)-concurrent versions (CV) algorithms in timeliness and average disruption.

关键词： Software Switches Software systems Mobile computing Unified modeling language Computational modeling Software algorithms Bigraph model evolution reliability place change software architecture software evolution

来源：评论

学校读者我要写书评

暂无评论

Population-Specific Glucose Prediction in Diabetes Care With Transformer-Based Deep Learning on the Edge

引用

IEEE transactions ON BIOMEDICAL CIRCUITS AND systems 2024年第2期18卷 236-246页

作者： Zhu, Taiyu Kuang, Lei Piao, Chengzhe Zeng, Junming Li, Kezhi Georgiou, Pantelis Imperial Coll London Ctr Bioinspired Technol Dept Elect & Elect Engn London SW7 2BX England Univ Oxford Dept Psychiat Oxford OX1 2JD England UCL Inst Hlth Informat London SW7 2BX England

Leveraging continuous glucose monitoring (CGM) systems, real-time blood glucose (BG) forecasting is essential for proactive interventions, playing a crucial role in enhancing the management of type 1 diabetes (T1D) and type 2 diabetes (T2D). However, developing a model generalized to a population and subsequently embedding it within a microchip of a wearable device presents significant technical challenges. Furthermore, the domain of BG prediction in T2D remains under-explored in the literature. In light of this, we propose a population-specific BG prediction model, leveraging the capabilities of the temporal fusion Transformer (TFT) to adjust predictions based on personal demographic data. Then the trained model is embedded within a system-on-chip, integral to our low-power and low-cost customized wearable device. This device seamlessly communicates with CGM systems through Bluetooth and provides timely BG predictions using edge computing. When evaluated on two publicly available clinical datasets with a total of 124 participants with T1D or T2D, the embedded TFT model consistently demonstrated superior performance, achieving the lowest prediction errors when compared with a range of machine learning baseline methods. Executing the TFT model on our wearable device requires minimal memory and power consumption, enabling continuous decision support for more than 51 days on a single Li-Poly battery charge. These findings demonstrate the significant potential of the proposed TFT model and wearable device in enhancing the quality of life for people with diabetes and effectively addressing real-world challenges.

关键词： Diabetes Thin film transistors Glucose Transformers Predictive models Computational modeling Deep learning Artificial intelligence deep learning diabetes edge computing glucose prediction low power wearable device transformer

来源：评论

学校读者我要写书评

暂无评论

SPIMulator: A Spintronic Processing-in-memory Simulator for Racetracks

引用

ACM transactions on embedded computing systems 2024年第6期23卷 1-27页

作者： Bera, Pavia Cahoon, Stephen Bhanja, Sanjukta Jones, Alex Univ S Florida 4202 E Fowler Ave Tampa FL 33620 USA Univ Pittsburgh 1238 Benedum Hall Pittsburgh PA 15261 USA

In-memory processing is becoming a popular method to alleviate the memory bottleneck of the Von Neumann computing model. With the goal of improving both latency and energy cost associated with such in-memory processing, emerging non-volatile memory technologies, such as Spintronic magnetic memory, are of particular interest, as they can provide a near-SRAM read/write performance and eliminate nearly all static energy without experiencing any endurance limitations. Spintronic Racetrack Memory (RM) further addresses density concerns of spin-transfer torque memory (STT-MRAM). Moreover, it has recently been demonstrated that portions of RM nanowires can function as a polymorphic gate, which can be leveraged to implement multi-operand bulk bitwise operations. With more complex control, they can also be leveraged to build arithmetic integer and floating point processing in memory (PIM) primitives. This article proposes SPIMulator, a Spintronic PIM sim ulator that can simulate the storage and PIM architecture of executing PIM commands in Racetrack memory. SPIMulator functionally models the polymorphic gate properties recently proposed for Racetrack memory, which allows transverse access that determines the number of "1"s in a segment of each Racetrack nanowire. From this simulation, SPIMulator can report real-time performance statistics such as cycle count and energy. Thus, SPIMulator simulates the multi-operand bit-wise logic operations recently proposed and can be easily extended to implement new PIM operations as they are developed. Due to the functional nature of SPIMulator, it can serve as a programming environment that allows development of PIMbased codes for verification of new acceleration algorithms. We demonstrate the value of SPIMulator through the modeling and estimations of performance and energy consumption of a variety of example applications, including the Advanced Encryption Standard (AES) for encryption primarily based on logical and look-up operations;mu

关键词： Additional Key Words and Phrases In-memory computing domain wall memory spintronic memory processing in memory

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：