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Multi-science applications with single codebase - GAMER - for massively parallel architectures

Multi-science applications with single codebase - GAMER - fo...

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2011 International conference for High Performance Computing, Networking, Storage and Analysis, SC11

作者： Shukla, Hemant Schive, Hsi-Yu Woo, Tak-Pong Chiueh, Tzihong Lawrence Berkeley National Laboratory 1 Cyclotron Road Berkeley United States Department of Physics National Taiwan University 106 Taipe Taiwan Department of Physics Soochow University 106 Taipei Taiwan

ISBN: (纸本)9781450307710

The growing need for power efficient extreme-scale high-performance computing (HPC) coupled with plateauing clock-speeds is driving the emergence of massively parallel compute architectures. Tens to many hundreds of cores are increasingly made available as compute units, either as the integral part of the main processor or as coprocessors designed for handling massively parallel workloads. In the case of many-core graphics processing units (GPUs) hundreds of SIMD cores primarily designed for image and video rendering are used for high-performance scientific computations. The new architectures typically offer ANSI standard programming models such as CUDA (NVIDIA) and OpenCL. However, the wide-ranging adoption of these parallel architectures is steeped in difficult learning curve and requires reengineering of existing applications that mostly leads to expensive and error prone code rewrites without prior guarantee and knowledge of any speedups. Broad range of complex scientific applications across many domains use common algorithms and techniques, such as adaptive mesh refinements (AMR), advanced hydrodynamics partial differential equation (PDE) solvers, Poisson-Gravity solvers etc, that have demonstrably performed highly efficiently on GPU based systems. Taking advantage of the commonalities, we use GPU-aware AMR code, GAMER [1], to examine the unique approach of solving multi-science problems in astrophysics, hydrodynamics and particle physics with single codebase. We demonstrate significant speedups in disparate class of scientific applications on 3 separate clusters, viz., Dirac, Laohu and Mole 8.5. By extensively reusing the extendable single codebase we mitigate the impediments of significant code rewrites. We also collect performance and energy consumption benchmark metrics on 50-nodes NVIDIA C2050 GPU and Intel 8-core Nehalem CPU on Dirac cluster at the National Energy Research Supercomputing Center (NERSC). In addition, we propose a strategy and framework for

关键词： Graphics processing unit

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The performance realities of massively parallel processors: A case study

The performance realities of massively parallel processors: ...

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1992 ACM/IEEE conference on Supercomputing, Supercomputing 1992

作者： Lubeck, Olaf M. Simmons, Margaret L. Wasserman, Harvey J. Computer Research Group Los Alamos National Laboratory Los AlamosNM87545 United States

ISBN: (纸本)0818626305

We present the results of an architectural comparison of SIMD massive parallelism, as implemented in the Thinking Machines Corp. CM-2, and vector or concurrent-vector processing, as implemented in the Cray Research Inc. Y-MP/8. The comparison is based primarily upon three application codes taken from the LANL CM-2 workload. Tests were run by porting CM Fortran codes to the Y-MP, so that nearly the same level of optimization was obtained on both machines. The results for fully-configured systems, using measured data rather than scaled data from smaller configurations, show that the Y-MP/8 is faster than the 64k CM-2 for all three codes. A simple model that accounts for the relative characteristic computational speeds of the two machines, and reduction in overall CM-2 performance due to communication or SIMD conditional execution, accurately predicts the performance of two of the three codes. Other factors, such as memory bandwidth and compiler effects, are also discussed. Finally, the paper shows the similarity of the CM-2 and Y-MP programming models, and also comments on selected future massively parallel processor designs. © 1992 IEEE.

关键词： parallel processing systems

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PYRAMID MACHINE SIMULATOR FOR THE SYMBOLICS 3600.

PYRAMID MACHINE SIMULATOR FOR THE SYMBOLICS 3600.

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Proceedings - CVPR '86: IEEE Computer Society conference on Computer Vision and Pattern Recognition.

作者： Blanford, Ronald P. Tanimoto, Steven L. Univ of Washington Seattle WA USA Univ of Washington Seattle WA USA

ISBN: (纸本)0818607211

A pyramid machine is a massively parallel computer architecture configured to allow certain common image processing operations to be executed at a cost which is logarithmic in the size of the image. In the absence of a working prototype, a flexible simulator is required to study complex algorithms for such a machine effectively. Developing a simulator involves deciding whether to implement basic operations directly or to simulate macros involving multiple operations, and if so, verifying that the simulation correctly implements the macro. The authors briefly describe one implementation of such a simulator and discuss these issues and how they were addressed.

关键词： Computer programming

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16th IFIP working Group 7.3 International Symposium on Computer Performance Modeling, Measurement and Evaluation and ACM SIGMETRICS conference on Measurement and Modeling of Computer Systems, 1993

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16th IFIP working Group 7.3 International Symposium on Computer Performance Modeling, Measurement and Evaluation and ACM SIGMETRICS conference on Measurement and Modeling of Computer Systems, 1993

ISBN: (纸本)9783540572978

The proceedings contain 26 papers. The special focus in this conference is on Computer Performance Modeling, Measurement and Evaluation. The topics include: parallel simulation;properties and analysis of queueing network models with finite capacities;performance analysis and optimization with the power-series algorithm;multiprocessor and distributed system design;response time distributions in queueing network models;fast simulation of rare events in queueing and reliability models;an inlxoduction to modeling dynamic behavior with time series analysis;issues in trace-driven simulation;maximum entropy analysis of queueing network models;performance modeling using DSPN express;relaxation for massively parallel discrete event simulation;an overview of tes processes and modeling methodology;performance engineering of client-server systems;queueing networks with finite capacities;performance instrumentation techniques for parallel systems;a survey of bottleneck analysis in closed networks of queues;software performance engineering;performance measurement using system monitors;providing quality of service packet switched networks;dependability and performability analysis;architectures and algorithms for digital multimedia on-demand servers;analysis and control of polling systems;modeling and analysis of transaction processing systems.

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Enabling ISO Standard Languages for Complex HPC Workflows 21st

Enabling ISO Standard Languages for Complex HPC Workflows

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21st Smoky Mountains Computational Sciences and Engineering conference (SMC)

作者： Lopez, M. Graham Hammond, Jeff R. Wells, Jack C. Gibbs, Tom Costa, Timothy B. NVIDIA Santa Clara CA 95051 USA

ISBN: (纸本)9783030964986;9783030964979

parallel processing is increasingly important in scientific software, not only for supercomputer simulations, but also for edge computing applications and intelligently processing experimental data in real time. Due to this expansion in the diversity of hardware being used for next-generation and fused experimental/HPC facilities, productively writing code that performs well across these diverse environments is an increasing concern. To meet this challenge, NVIDIA is working in the Standard C++ Committee to develop a roadmap for C++ Standard parallelism, a parallel programming model that is portable to all platforms, from massively parallel HPC to many-core embedded systems, while preserving the defining goals of C++: performance and efficiency for most use cases. Our vision of C++ Standard parallelism consists of three key components: (1) Common parallel algorithms that dispatch to vendor-optimized parallel libraries;(2) Tools to write your own parallel algorithms that run anywhere;(3) Mechanisms for composing parallel invocations of algorithms into task graphs. In this paper, we'll dive into this roadmap and how it fits into NVIDIA's broader strategy that also includes parallelism in ISO Standard Fortran and highly optimized library APIs to enable full-platform scientific productivity. We'll discuss what we already have that you can use today across a wide variety of deployed systems, what's coming down the line, and where the future may lead us.

关键词： programming languages Performance portability

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2nd International conference on parallel Architectures and Languages Europe, PARLE 1989

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2nd International conference on parallel Architectures and Languages Europe, PARLE 1989

ISBN: (纸本)9783540512851

The proceedings contain 56 papers. The special focus in this conference is on parallel Architectures and Languages Europe. The topics include: Performance analysis of a parallel Prolog: A correlated approach;Visual concurrent object-based programming in GARP;parle: A parallel target language for integrating symbolic and numeric processing;a method for refining atomicity in parallel algorithms;comparing two fully abstract dataflow models;learning by back-propagation: Computing in a systolic way;towards systolizing compilation: An overview;strategies for a massively parallel implementation of simulated annealing;the compaction of acyclic terms;multiple tuple spaces in Linda;a single-assignment language in a distributed memory multiprocessor;single-assignment semantics for imperative programs;a compiling approach for exploiting and-parallelism in parallel logic programming systems;data structures for parallel execution of functional languages;The typed λ-calculus with first-class processes;ASPEN: A stream processing environment;the expressive power of simple parallelism;compositionality in the temporal logic of concurrent systems;a temporal-logic based compositional proof system for real-time message passing;experiments in mimd parallelism;GTS: Extracting full parallelism out of DO loops;dataflow analysis of term graph rewriting systems;towards a theory of simulation for verification of concurrent systems;eliminating redundant interleavings during concurrent program verification;dataflow programs for parallel computations of logic programs and their semantics;RAPiD a data flow model for implementing parallelism and intelligent backtracking in logic programs.

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JAX Based parallel Inference for Reactive Probabilistic programming 2022

JAX Based Parallel Inference for Reactive Probabilistic Prog...

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23rd International conference on Languages, Compilers, and Tools for Embedded System (LCTES)

作者： Baudart, Guillaume Mandel, Louis Tekin, Reyyan PSL Univ DI ENS Ecole Normale Super CNRSInria Paris France IBM Res Armonk NY USA

ISBN: (纸本)9781450392662

ProbZelus is a synchronous probabilistic language for the design of reactive probabilistic models in interaction with an environment. Reactive inference methods continuously learn distributions over the unobserved parameters of the model from statistical observations. Unfortunately, this inference problem is in general intractable. Monte Carlo inference techniques thus rely on many independent executions to compute accurate approximations. These methods are expensive but can be parallelized. We propose to use JAX to parallelize ProbZelus reactive inference engine. JAX is a recent library to compile Python code which can then be executed on massively parallel architectures such as GPUs or TPUs. In this paper, we describe a new reactive inference engine implemented in JAX and the new associated JAX backend for ProbZelus. We show on existing benchmarks that our new parallel implementation outperforms the original sequential implementation for a high number of particles.

关键词： Probabilistic programming Reactive programming Streaming Inference parallel Computing Compilation

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Integrating reactive and reflective reasoning by generating rational models 11th

Integrating reactive and reflective reasoning by generating ...

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11th Australian Joint conference on Artificial Intelligence, AI 98

作者： Bornscheuer, Sven-Erik KI TU Dresden Dresden01099 Germany

ISBN: (纸本)3540651381

We propose to model integrated reflective and reactive reasoning by massively parallel nonmonotonic model generation. To this end, a finite representation of models of normal logic programs is given, which is adapted to the interpretations typically produced by the meaning function TP. By simulating TP on top of this representation, only finite representations of (possibly infinite) interpretations are processed. These representations are significantly shorter than by using related approaches. Our work overcomes typical problems of model generation and results in a tractable method, and, thereby, enables the integrated reflective and reactive reasoning we propose. © Springer-Verlag Berlin Heidelberg 1998.

关键词： Logic programming

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Blue gene: A massively parallel system

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International conference on Computational Science, ICCS 2001

作者： Moreira, Jose E. IBM T. J. Watson Research Center Yorktown HeightsNY10598-0218 United States

ISBN: (纸本)3540422323

Blue Gene is a massively parallel system being developed at the IBM T. J. Watson Research Center. With its 4 million-way parallelism and 1 Petaflop peak performance, Blue Gene is a unique environment for research in parallel processing. Full exploitation of the machine’s capability requires 100-way shared memory parallelism inside a single-chip multiprocessor node and message-passing across 30,000 nodes. New programming models, languages, compilers, and libraries will need to be investigated and developed for Blue Gene, therefore offering the opportunity to break new ground in those areas. In this talk, I will describe some of the hardware and software features of Blue Genes. I will also describe some of the protein science and molecular dynamics computations that are important driving forces behind Blue Gene. © Springer-Verlag Berlin Heidelberg 2001.

关键词： Message passing

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Algorithms and Architectures for parallel Processing - 12th International conference, ICA3PP 2012, Proceedings

Algorithms and Architectures for Parallel Processing - 12th ...

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12th International conference on Algorithms and Architectures for parallel Processing, ICA3PP 2012

ISBN: (纸本)9783642330773

The proceedings contain 73 papers. The topics discussed include: accelerating the dynamic programming for the optimal polygon triangulation on the GPU;security computing for the resiliency of protecting from internal attacks in distributed wireless sensor networks;optimization of a short-range proximity effect correction algorithm in e-beam lithography using GPGPUs;vectorized algorithms for Quadtree construction and descent;an optimal parallel prefix-sums algorithm on the memory machine models for GPUs;enhancing the performance of a distributed mobile computing environment by topology construction;maintaining consistency in software transactional memory through dynamic versioning tuning;a new low latency parallel turbo decoder employing parallel phase decoding method;high-performance matrix multiply on a massively multithreaded Fiteng1000 processor;and on construction of Cloud IaaS for VM live migration using KVM and OpenNebula.

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