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共 234 条记录，以下是121-130 订阅

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The high performance solution of irregular problems

The high performance solution of irregular problems

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working conference on massively parallel programming models

作者： P. Dew J. Nash Scalable Systems and Algorithms Group School of Computer Studies University of Leeds Leeds West Yorkshire UK

Progress in networking technologies now allows the implementation of a 1,000 processor machine which scales linearly in performance The key to realising the potential of these machines is in the support for high performance code which is both scalable (in problem size and number of processors) and portable, using structured software design methods. Work at Leeds has been studying the use of a typed shared memory system, based around the use of Shared Abstract Data Types (SADTs), to provide a structured view of sharing in a parallel machine. This has concentrated on the support for irregular problems, in which the patterns of communication and synchronisation can vary dynamically. SADTs augment the serial ADT with the ability to support concurrent access, encouraging modular and reusable code. The performance of an SADT can be optimised by supporting weak data consistency semantics (where this does not effect the correctness of the given application), and by careful tuning on the given parallel platform. The use of a well defined computational model is critical to the support of scalable and portable SADTs by capturing the dominant machine characteristics which effect performance. The Weakly coherent PRAM (WPRAM) model is an extension of the BSP approach, which has been used to design the SADTs, and to predict their performance. The paper provides a case study to illustrate this approach, based on the travelling salesman problem. Results for a 256 processor Cray T3D machine are provided, which demonstrate the high and scalable performance which has been achieved.

关键词： Bandwidth Delay parallel processing Computational modeling Phase change random access memory Scalability Concurrent computing Computer networks Software design parallel machines

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Algorithms and Architectures for parallel Processing - 12th International conference, ICA3PP 2012, Proceedings

Algorithms and Architectures for Parallel Processing - 12th ...

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12th International conference on Algorithms and Architectures for parallel Processing, ICA3PP 2012

ISBN: (纸本)9783642330643

The proceedings contain 73 papers. The topics discussed include: accelerating the dynamic programming for the optimal polygon triangulation on the GPU;security computing for the resiliency of protecting from internal attacks in distributed wireless sensor networks;optimization of a short-range proximity effect correction algorithm in e-beam lithography using GPGPUs;vectorized algorithms for Quadtree construction and descent;an optimal parallel prefix-sums algorithm on the memory machine models for GPUs;enhancing the performance of a distributed mobile computing environment by topology construction;maintaining consistency in software transactional memory through dynamic versioning tuning;a new low latency parallel turbo decoder employing parallel phase decoding method;high-performance matrix multiply on a massively multithreaded Fiteng1000 processor;and on construction of Cloud IaaS for VM live migration using KVM and OpenNebula.

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Accelerator-centered programming on heterogeneous systems 17

Accelerator-centered programming on heterogeneous systems

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17th International conference on parallel and Distributed Computing, Applications and Technologies (PDCAT)

作者： Chen, Cheng Du, Yunfei Yang, Canqun Natl Univ Def Technol Coll Comp Changsha Hunan Peoples R China

ISBN: (纸本)9781509050819

parallel many cores contribute to heterogenous architectures and achieve high computation throughput. working as coprocessors and connected to general-purpose CPUs via PCIe, those special-purpose cores usually work as float computing accelerators (ACC). The popular programming models typically offload the computing intensive parts to accelerator then aggregate results, which would result in a great amount of data transfer via PCIe. In this paper, we introduce an ACC centered model to leverage the limited bandwidth of PCIe, increase performance, reduce idle time of ACC. In order to realize dada-near-computing, our ACC-centered model arms to program centered on ACC and the control intensive parts are offloaded to CPU. Both CPU and ACC are devoted to higher performance with their architect feature. Validation on the Tianhe-2 supercomputer shows that the implementation of ACC-centered LU competes with the highly optimized Intel MKL hybrid implementation and achieves about 5x speedup versus the CPU version.

关键词： Heterogeneous Accelerator-centered LU MIC Tianhe-2

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Battery diagnosis for electrical vehicles through semi-physical fuzzy models

Battery diagnosis for electrical vehicles through semi-physi...

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IEEE International conference on Fuzzy Systems (FUZZ-IEEE) held as part of IEEE World Congress on Computational Intelligence (IEEE WCCI)

作者： Sanchez, Luciano Otero, Jose Couso, Ines Blanco, Cecilio Univ Oviedo Dept Comp Sci Asturias Spain Univ Oviedo Dept Stat Asturias Spain Univ Oviedo Dept Elect Asturias Spain

ISBN: (纸本)9781509006250

An intelligent model of a Li-Ion battery for electrical vehicles is proposed that allows for a fast battery health evaluation without the need of removing the battery from the vehicle. The only data needed for performing the condition monitoring are logged performance records (currents and voltages) that are commonly available at Battery Management Systems. The model comprises a combination of differential equations and fuzzy rule-based systems, these last being embedded as non-linear blocks in the differential equations. Fuzzy rules are learnt from data with the help of metaheuristics and fine tuned with gradient descent algorithms. A TensorFlow (TM) implementation of the learning algorithm has been developed that takes advantage of the numerical processing capabilities of a massively parallel GPU and improves the learning speed by a high margin.

关键词： Fuzzy models TensorFlow Li-FePO4 batteries Battery models Electrical Vehicles

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A short overview of executing γ chemical reactions over the ΣC and τC dataflow programming models

A short overview of executing γ chemical reactions over the...

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International conference on Computational Science, ICCS 2002

作者： Cudennec, Loïc Goubier, Thierry CEA LIST Gif-sur-Yvette91191 France

Many-core processors offer top computational power while keeping the energy consumption reasonable compared to complex processors. Today, they enter both high-performance computing systems, as well as embedded systems. However, these processors require dedicated programming models to efficiently benefit from their massively parallel architectures. The chemical programming paradigm has been introduced in the late eighties as an elegant way of formally describing distributed programs. Data are seen as molecules that can freely react thanks to operators to create new data. This paradigm has also been used within the context of grid computing and now seems to be relevant for many-core processors. Very few implementations of runtimes for chemical programming have been proposed, none of them giving serious elements on how it can be deployed onto a real architecture. In this paper, we propose to implement some parts of the chemical paradigm over the ΣC dataflow programming language, that is dedicated to many-core processors. We show how to represent molecules using agents and communication links, and to iteratively build the dataflow graph following the chemical reactions. A preliminary implementation of the chemical reaction mechanisms is provided using the τC dataflow compilation toolchain, a language close to ΣC, in order to demonstrate the relevance of the proposition. © The Authors. Published by Elsevier B.V.

关键词： Molecules

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Efficient parallel GCD Algorithms for Multicore Shared Memory Architectures 20

Efficient Parallel GCD Algorithms for Multicore Shared Memor...

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20th International conference on Advances in ICT for Emerging Regions (ICTer)

作者： Pathirana, Gihan Tharaka Sotheeswaran, Sittampalam Ratnarajah, Nagulan Eastern Univ Fac Sci Dept Math Chenkaladi Sri Lanka Univ Jaffna Fac Appl Sci Dept Phys Sci Vavuniya Campus Jaffna Sri Lanka

ISBN: (纸本)9781728186535

The greatest common divisor (GCD) is used for numerous applications in number theory, modular arithmetic, encryption algorithms such as RSA, random number generation, and solving linear Diophantine equations. High-performance algorithms, which are efficiently and accurately find the GCD of two integers and n (>2) integers, are needed in the modern world for many applications in science and engineering. parallel hardware and parallel programming solve such emerging challenges that are not possible in a serial world. Modern desktop and laptop computers are equipped with multicore processors with shared memory architecture. In this paper, we develop novel efficient parallel.. integers GCD algorithms for multicore shared memory architecture. The brute force, divide-and-conquer, linear recursive and finding minimum first techniques are adopted in our novel algorithms to reduce the size and the complexity of the n integers GCD problem. Various working models of OpenMP, such as the thread-centric, loop-centric and task-centric models are utilized, which promised a more natural way of exploiting and expressing regular and irregular algorithms. A comprehensive performance analysis applies to prove the efficiency of the proposed algorithms.

关键词： GCD parallel algorithm Shared Memory Multicore OpenMP

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An algorithm of parallel programming design based on problem domain model

An algorithm of parallel programming design based on problem...

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2012 International conference on Web Information Systems and Mining, WISM 2012

作者： Zhang, Xin Guo, Guangnan Bai, Lu Zhang, Yu Wang, Hao Department of Fundamental Courses Air Force Logistics College Xuzhou China

ISBN: (纸本)9783642334689

parallel algorithm in parallel program design has close relationship with problem type to be solved. Correct utilization of problem type can effectively improve parallelism of program. The paper proposed parallel programming selection algorithm based on problem domain. It models and matches program structure to find appropriate parallel program design method. The practical application example of proposed algorithm was provided to illustrate it can effectively improve working efficiency of parallel program. The performance analysis result also shows that the method can adequately give full play of parallel nature of program. © Springer-Verlag Berlin Heidelberg 2012.

关键词： Decision making

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Performance study of a minimalistic simulator on XSEDE massively parallel systems 14

Performance study of a minimalistic simulator on XSEDE massi...

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2014 Annual conference on Extreme Science and Engineering Discovery Environment, XSEDE 2014

作者： Rong, Rong Hao, Jiang Liu, Jason Florida International University 11200 SW 8th Street Miami FL 33199 United States

ISBN: (纸本)9781450328937

Scalable Simulation Framework (SSF), a parallel simulation application programming interface (API) for large-scale discrete-event models, has been widely adopted in many areas. This paper presents a simplified and yet more streamlined implementation, called Mini-SSF. MiniSSF maintains the core design concept of SSF, while removing some of the complex but rarely used features, for sake of efficiency. It also introduces several new features that can greatly simplify model development efforts and/or improve the simulator's performance. More specifically, an automated compiler-based source-code translation scheme has been adopted in MiniSSF to enable scalable process-oriented simulation using handcrafted threads. A hierarchical hybrid synchronization algorithm has been incorporated in the simulator to improve parallel performance. Also, a new set of platform-independent API functions have been added for developing simulation models to be executed transparently on different parallel computing platforms. In this paper, we report performance results from experiments on different XSEDE platforms to assess the performance and scalability of MiniSSF. It is shown that the simulator can achieve superior performance. The simulator can adapt its synchronization according to the model's computation and communication demands, as well as the underlying parallel platform. The results also suggest that more automatic adaptation and fine-grained performance tuning is necessary for handling more complex large-scale simulation scenarios. Copyright 2014 ACM.

关键词： Simulators

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A comparison of parallel machine models from the point of view of scalability

A comparison of parallel machine models from the point of vi...

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International conference on massively parallel Computing Systems

作者： M. Cosnard LIP-CNRS Ecole Normale Supérieure de Lyon Lyon France

We compare various models of parallel machines and show that they can be classified in two classes: algorithm oriented or execution oriented. None of them are really satisfying from the user's point of view. Hence bridging models have been proposed. Contrarily to what is done in sequential where a two-level decomposition is used (programmimg-compiling), we assert that a parallel programming methodology must be based on a three-level decomposition. We define the notion of algorithms which scales on a distributed memory parallel computer. We propose such a methodology and advocate its advantages. Then we point out the main difficulties in parallel programming.< >

关键词： parallel machines Scalability Phase change random access memory Concurrent computing Distributed computing parallel programming Delay Algorithm design and analysis Computer networks parallel architectures

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High Performance parallel JPEG2000 Streaming Decoder Using GPGPU-CPU Heterogeneous System

High Performance Parallel JPEG2000 Streaming Decoder Using G...

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23rd IEEE International conference on Application-Specific Systems, Architectures and Processors (ASAP)

作者： Le, Roto Mundy, Joseph L. Bahar, R. Iris Brown Univ Sch Engn Providence RI 02912 USA

ISBN: (纸本)9780769547688

The JPEG2000 image coding standard provides many superior features compared to JPEG and other compression standards. However, the relatively slow performance of JPEG2000, especially in software implementations, is a critical drawback of the standard. Moreover, as image sizes rapidly grow in size, higher demands on performance for image coding and processing are introduced, making the slow performance of JPEG2000 even further pronounced. While much effort over the past decade has been devoted to accelerating the JPEG2000 encoder, there have been very few studies focusing on improving the performance of the JPEG2000 decoder, despite the fact that the performance of the decoder is just as critical as the encoder. This paper proposes a high-performance JPEG2000 decoder that efficiently exploits the recent improvements of modern parallel programming models and hardware architectures. Specifically, a parallel streaming decoder running on a GPGPU-CPU heterogeneous system is developed to fully exploit both the flexibility of the high-performance multi-core CPUs and the massively parallel capability of GPGPUs. In addition, a new task scheduling strategy is developed that exploits the soft-heterogeneity in OpenCL and C/C++ at runtime in order to gain a significant performance boost. Running on a heterogeneous configuration of one Nvidia GTX 480 GPU and one Intel Core i7 CPU, the parallel streaming decoder gains more than 8x speedup in runtime compared to the JasPer JPEG2000 software implementation.

关键词： JPEG2000 Decoder EBCOT MQ coder Tier-1 Tier-2 Wavelet GPGPU CPU Heterogeneous parallel OpenCL/CUDA

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