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检索条件"任意字段=Working Conference on Massively Parallel Programming Models"

共 235 条记录，以下是11-20 订阅

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Research on Control Mechanism of FAST Nodes Based on Goal programming

Research on Control Mechanism of FAST Nodes Based on Goal Pr...

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IEEE International conference on Electrical Engineering, Big Data and Algorithms (EEBDA)

作者： Zhang, Lipeng Changsha Univ Sci & Technol Changsha Peoples R China

ISBN: (纸本)9781665416061

As one of the three major innovations of FAST, the active reflective surface is composed of main components such as the main cable net, reflective panel, pull-down cable, actuator and supporting structure. Its essence is to adjust the reflecting surface in the illumination range to the designated parabolic position in real time according to the position of the observed celestial body, so that the parallel electromagnetic waves emitted by the celestial body will always converge at one point after being reflected by the reflecting surface. Aiming at the problem that the Chinese FAST sky eye reflector panel automatically adjusts the overall shape to the working paraboloid to achieve the best electromagnetic wave reflection effect under the condition of different positions of the measured celestial body, a single target optimization, target planning, single reflector panel and other models have been constructed. With the ideal parabola and actuator adjustment scheme, the reception ratio after adjustment is increased by 5 times. According to the adjustment strategy of the reflective panel obtained by the research, the nodes with a node displacement greater than 0.5m account for 0.14%, and the performance is good.

关键词： FAST single objective optimization variable step size search method objective programming

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Performance Portability Evaluation of Fluid-Structure Interaction Simulations on Heterogeneous Platforms

Performance Portability Evaluation of Fluid-Structure Intera...

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ISC High Performance 2025 Research Paper Proceedings (40th International conference)

作者： Aristotle Martin Ayman Yousef Geng Liu William Ladd Antigoni Georgiadou Jorik Stoop Amanda Randles Biomedical Engineering Duke University Durham USA Leadership Computing Facility Argonne National Laboratory Lemont USA Oak Ridge National Laboratory National Center for Computational Sciences Oak Ridge USA

ISBN: (数字)9783982633619

The rapid proliferation of heterogeneous programming languages and multi-vendor hardware has underscored the critical need to evaluate the performance portability of scientific applications. In this work, we present the systematic porting and optimization of a massively parallel fluid-structure interaction code across multiple heterogeneous programming frameworks for deployment on leadership-class supercomputers from major vendors. Our analysis focuses on at-scale performance for simulations involving hundreds of millions of deformable cells, executed on a combination of CPUs and GPUs spanning thousands of nodes on exascale machines. We benchmark the performance of each implementation, highlighting the trade-offs inherent in adopting diverse programming models. Key insights regarding the portability of CUDA on multi-vendor platforms, the superior multi-core CPU performance from SYCL, and architectural considerations on performance optimization are distilled from our experience, offering guidance to other users of high performance computing based on our findings.

关键词： Codes Biological system modeling Computational modeling High performance computing Graphics processing units Computer architecture programming Hardware Supercomputers Optimization

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A massively parallel reservoir simulator on the GPU architecture

A massively parallel reservoir simulator on the GPU architec...

引用

SPE Reservoir Simulation conference 2021, RSC 2021

作者： Middya, Usuf Manea, Abdulrahman Alhubail, Maitham Ferguson, Todd Byer, Thomas Dogru, Ali Saudi Aramco Aramco Americas

ISBN: (纸本)9781613997475

Reservoir simulation computational costs have been continuously growing due to high-resolution reservoir characterization, increasing model complexity, and uncertainty analysis workflows. Reducing simulation costs by upscaling is often necessary for operational requirements. Fast evolving HPC technologies offer opportunities to reduce cost without compromising fidelity. This work presents a novel in-house massively parallel full-physics reservoir simulator running on the emerging GPU architecture. Almost all the simulation kernels have been designed and implemented to honor the GPU SIMD programming paradigm. These kernels include physical property calculations, phase equilibrium computations, Jacobian construction, linear and nonlinear solvers, and wells. Novel techniques are devised in various kernels to expose enough parallelism to ensure that the control and data-flow patterns are well suited for the GPU environment. Mixed-precision computation is also employed when appropriate (e.g., in derivative calculation) to reduce computational costs without compromising the solution accuracy. The GPU implementation of the simulator is tested and benchmarked using various reservoir models, ranging from the synthetic SPE10 Benchmark (Christie & Blunt, 2001) to several industrial-scale models. These real field models range in size from tens of millions of cells to more than billion cells with black-oil and multicomponent compositional fluid. The GPU simulator is benchmarked on the IBM AC922 massively parallel architecture having tens of NVidia Volta V100 GPUs. To compare performance with CPU architectures, an optimized CPU implementation of the simulator is benchmarked on the IBM AC922 CPUs and on a cluster consisting of thousands of Intel's Haswell-EP Xeon® CPU E5-2680 v3. Detailed analysis of several numerical experiments comparing the simulator performance on the GPU and the CPU architectures is presented. In almost all of the cases, the analysis shows that the use of har

关键词： Graphics processing unit

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Analysis of Source Code Based on Changes in its State Over Time - Using User Behavior models

Analysis of Source Code Based on Changes in its State Over T...

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Automatics and Informatics (ICAI), International conference

作者： Mihail Petrov Vladimir Valkanov Mathematics and Informatic Faculty Plovdiv University Plovdiv Bulgaria

One of the popular trends for increasing productivity in the development of software products is related to integrating tools based on artificial intelligence, which actively supports software engineers' actions in dealing with syntactic and semantic problems. A parallel can quickly be drawn between a similar class of tools and the platforms to train future developers. However, the main drawback of most media of this nature is the focus on the result of the problem and the complete ignoring of the intermediate steps aimed at analyzing the behavior of the developer. In this article, we will pay attention to analyzing syntactic, semantic, platform, and analytical problems generated as a result of working on programming problems in a virtual educational environment.

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DiCE: Distributed Code Generation and Execution

DiCE: Distributed Code Generation and Execution

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Pervasive and Intelligent Computing (PICom), IEEE conference on

作者： Kunal Rao Giuseppe Coviello Srimat Chakradhar NEC Laboratories America Princeton NJ

ISBN: (数字)9798331522742

ISBN: (纸本)9798331522759

Generative artificial intelligence (GenAI), specifically, Large Language models (LLMs), have shown tremendous potential in automating several tasks and improving human productivity. Recent works have shown them to be quite useful in writing and summarizing text (articles, blogs, poems, stories, songs, etc.), answering questions, brainstorming ideas, and even writing code. Several LLMs have emerged specifically targeting code generation. Given a prompt, these LLMs can generate code in any desired programming language. Many tools like ChatGPT, CoPilot, CodeWhisperer, Cody, DeepSeek Coder, StarCoder, etc. are now routinely being used by software developers. However, most of the prior work in automatic code generation using LLMs is focused on obtaining “correct” and working code, and mainly runs on a single computer (serial code). In this paper, we take this to the next level, where LLMs are leveraged to generate code for execution on a distributed infrastructure. We propose a novel system called DiCE, which takes serial code as input and automatically generates distributed version of the code and efficiently executes it on a distributed setup. DiCE consists of two main components (a) LLM-based tool (Synthia) to understand dependencies in serial code and automatically generate distributed version of the code using specialized programming model and semantics, and (b) Runtime (Hermod) to understand the semantics in the distributed code and realize efficient execution on a cluster of machines (distributed infrastructure). DiCE currently focuses on visual programs synthesized by tools like ViperGPT [1] and VisReP [2] (serial code), automatically identifies higher-level task parallelism opportunities (e.g., parallel object detection), transforms the code to exploit the parallelism, and finally efficiently executes it on a cluster of machines. Through our experiments using 100 examples from the GQA dataset [3], we show that the serial codes generated by ViperGPT are successfu

关键词： Visualization Codes Runtime Generative AI Semantics Transforms parallel processing Writing programming Software

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Benchmarking Thread Block Cluster

Benchmarking Thread Block Cluster

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IEEE conference on High Performance Extreme Computing (HPEC)

作者： Tim Lühnen Tobias Marschner Sohan Lal Massively Parallel Systems Group Hamburg University of Technology Hamburg Germany

ISBN: (数字)9798350387131

ISBN: (纸本)9798350387148

Graphics processing units (GPUs) have become essential accelerators in the fields of artificial intelligence (AI), high performance computing (HPC), and data analytics, offering substantial performance improvements over traditional computing resources. In 2022, NVIDIA's release of the Hopper architecture marked a significant advancement in GPU design by adding a new hierarchical level to their CUDA programming model: the thread block cluster (TBC). This feature enables the grouping of thread blocks, facilitating direct communication and synchronization between them. To support this, a dedicated SM-to-SM network was integrated, connecting streaming multiprocessors (SMs) to facilitate efficient inter-block communication. This paper delves into the performance characteristics of this new feature, specifically examining the latencies developers can anticipate when utilizing the direct communication channel provided by TBCs. We present an analysis of the SM-to-SM network behavior, which is crucial for developing accurate analytical and cycle-accurate simulation models. Our study includes a comprehensive evaluation of the impact of TBCs on application performance, highlighting scenarios where this feature can lead to significant improvements. For instance, applications where a data-producing thread block writes data directly into the shared memory of the consuming thread block can be up to 2.3x faster than using global memory for data transfer. Additionally, applications constrained by shared memory can achieve up to a 2.1x speedup by employing TBCs. Our findings also reveal that utilizing large cluster dimensions can result in an execution time overhead exceeding 20%. By exploring the intricacies of the Hopper architecture and its new TBC feature, this paper equips developers with the knowledge needed to harness the full potential of modern GPUs and assists researchers in developing accurate analytical and cycle-accurate simulation models.

关键词： Analytical models Accuracy Instruction sets Computational modeling Graphics processing units Benchmark testing Data transfer Synchronization Resource management Artificial intelligence

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HiAER-Spike: Hardware-Software Co-Design for Large-Scale Reconfigurable Event-Driven Neuromorphic Computing

HiAER-Spike: Hardware-Software Co-Design for Large-Scale Rec...

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IEEE International conference on Rebooting Computing (ICRC)

作者： Gwenevere Frank Gopabandhu Hota Keli Wang Abhinav Uppal Omowuyi Olajide Kenneth Yoshimoto Leif Gibb Qingbo Wang Johannes Leugering Stephen Deiss Gert Cauwenberghs Institute for Neural Computation UC San Diego La Jolla CA

ISBN: (数字)9798331541279

ISBN: (纸本)9798331541286

In this work, we present HiAER-Spike, a modular, reconfigurable, event-driven neuromorphic computing platform designed to execute large spiking neural networks with up to 160 million neurons and 40 billion synapses - roughly twice the neurons of a mouse brain at faster-than real-time. This system, which is currently under construction at the UC San Diego Supercomputing Center, comprises a co-designed hard-and software stack that is optimized for run-time massively parallel processing and hierarchical address-event routing (HiAER) of spikes while promoting memory-efficient network storage and execution. Our architecture efficiently handles both sparse connectivity and sparse activity for robust and low-latency event-driven inference for both edge and cloud computing. A Python programming interface to HiAER-Spike, agnostic to hardware-level detail, shields the user from complexity in the configuration and execution of general spiking neural networks with virtually no constraints in topology. The system is made easily available over a web portal for use by the wider community. In the following we provide an overview of the hard- and software stack, explain the underlying design principles, demonstrate some of the system’s capabilities and solicit feedback from the broader neuromorphic community.

关键词： Adaptation models Neuromorphic engineering Computational modeling Neurons Computational neuroscience Full stack Spiking neural networks Low latency communication Portals Python

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Performance Evaluation of K-Means Clustering Using MapReduce programming Model

Performance Evaluation of K-Means Clustering Using MapReduce...

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Technological Advancements in Computational Sciences (ICTACS), International conference on

作者： Akshita Semwal Anirudh Purohit Pallava Joshi Manisha Basera Vihan Singh Bhakuni Manika Manwal Computer Science and Engineering Graphic Era Hill University Dehradun Uttarakhand India R/S Graphic Era Deemed to be University Dehradun Uttarakhand India

ISBN: (数字)9798350387490

ISBN: (纸本)9798350387506

In the current era of unparalleled data expansion, effective handling. large datasets have emerged as a crucial obstacle. When using enormous datasets that are terabytes or petabytes in size, the conventional k-means clustering approach has computational time limits. In the MapReduce framework, we assess the k-means algorithm.'s performance using multiple methods: K-means simple, K-means with Initial Equidistant Centres (IEC), and K-means Java implementation. on MapReduce. We investigate the newsgroup dataset and evaluate their performance in various infrastructures. settings. We also perform a comparative study at different iteration levels between the above-mentioned K-means methods. We use this study to demonstrate improvement in calculated time performance with various infrastructures. Additionally, we also analyze k means algorithms and their behavior with respect to centroids and various iteration levels, and hence provide deeper insights into their dynamics. Our paper offers useful benchmarks for further research and practices working with large-scale data clustering, illuminating the best methods to make use of parallel computation.

关键词： Performance evaluation Java Analytical models Heuristic algorithms Computational modeling Clustering algorithms IEC programming Benchmark testing

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Hybridization of Mixed-Integer Linear Program and Discrete Event Systems for Robust Scheduling on parallel Machines

Hybridization of Mixed-Integer Linear Program and Discrete E...

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International-Federation-of-Information-Processing-working-Group-5.7 (IFIP WG 5.7) International conference on Advances in Production Management Systems (APMS)

作者： Aubry, A. Marange, P. Lemoine, D. Himmiche, S. Norre, S. Univ Lorraine CRAN CNRS F-54000 Nancy France IMT Atlantique LS2N UMR 6004 Nantes France Clermont Auvergne Univ LIMOS UMR 6158 Clermont Ferrand France

ISBN: (纸本)9783030858742;9783030858735

This paper proposes an approach for robust scheduling on parallel machines. This approach is based on a combination of robust mathematical and discrete event systems models which are iteratively called in order to converge towards a schedule with the required robustness level defined by the decision maker. Experimentations on a small instance (10 jobs and 2 unrelated machines) and a more complex one (30 jobs and 6 uniform machines) show that this approach permits to converge quickly to a robust schedule even if the probability distribution associated to the uncertainties are not symmetrical. The approach achieves a better rate of convergence than those of the literature's methods.

关键词： Robust scheduling Robust mixed integer programming model Discrete event systems parallel machines

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XTest: A parallel Multilingual Corpus with Test Cases for Code Translation and Its Evaluation*

XTest: A Parallel Multilingual Corpus with Test Cases for Co...

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International conference on Computer and Information Technology (ICCIT)

作者： Israt Jahan Rithy Hasib Hossain Shakil Niloy Mondal Fatema Sultana Faisal Muhammad Shah Department of Computer Science and Engineering Ahsanullah University of Science and Technology Dhaka Bangladesh

The advancement of artificial intelligence has significantly improved the automated generation, summarization and translation of source code. Researchers are working together to improve the automated coding tasks to bring the next generation of programming systems. Currently there are few corpora available for automated code generation, summarization and translation tasks but these corpora and models are limited within common languages like C, C++, Python, Java, etc. Also none of the existing corpus contains appropriate test cases to evaluate a program properly. This paper introduces XTest: A parallel Multilingual Corpus with Test Cases for Code Translation. Our dataset contains parallel programs in 9 languages, Problem statement and test cases. Also in this work, we have built 30 systems to translate code between some high-resourced(C++, Python, etc) and low-resourced (Go, Ruby, etc) programming languages.

关键词： Java Codes Source coding Computational modeling programming Software Task analysis

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