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检索条件"任意字段=Workshop on Model Reduction for Circuit Simulation"
121 条 记 录,以下是11-20 订阅
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HexMG: A circuit-model Based Finite Multi-Domain Simulator  29
HexMG: A Circuit-Model Based Finite Multi-Domain Simulator
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29th International workshop on Thermal Investigations of ICs and Systems,(THERMINIC)
作者: Pohl, Laszlo Budapest Univ Technol & Econ Dept Electron Devices Fac Elect Engn & Informat Muegyetem rkp 3 H-1111 Budapest Hungary
This paper presents a new open-source simulator that aims to provide a tool to study a wide range of current and future problems requiring high-resolution distributed simulation in engineering practice, especially in ... 详细信息
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Generation of efficient behavioral models using model compilation and model reduction techniques
Generation of efficient behavioral models using model compil...
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10th International workshop on Symbolic and Numerical Methods, modeling and Applications to circuit Design, SM2ACD 2008
作者: Halfmann, Thomas Broz, Jochen Knoth, Christoph Platte, Daniel Rotter, Peter Fraunhofer ITWM System Analysis Prognosis and Control Fraunhofer-Platz 1 Kaiserslautern 67663 Germany Technische Universität München Lehrstuhl für Entwurfsautomatisierung Arcisstr. 21 München 80333 Germany Qimonda AG Am Campeon 1-12 Neubiberg 85579 Germany Infineon Technologies AG Am Campeon 1-12 Neubiberg 85579 Germany
Symbolic methods are a promising technology for the automatic bottom-up generation of analog behavioral models for an efficient verification in circuit design. However, in comparison to standard circuit simulation the... 详细信息
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Balancing-related model reduction of circuit equations using topological structure
Balancing-related model reduction of circuit equations using...
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workshop on model reduction for circuit simulation
作者: Stykel, Tatjana
In recent years, model order reduction has been recognized to be a powerful tool in analysis and simulation of integrated circuits. We consider balancing-related model reduction methods for differential-algebraic equa... 详细信息
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circuit realization method for reduced order inductive PEEC modeling circuits
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COMPEL-THE INTERNATIONAL JOURNAL FOR COMPUTATION AND MATHEMATICS IN ELECTRICAL AND ELECTRONIC ENGINEERING 2016年 第3期35卷 1203-1217页
作者: Trung-Son Nguyen Tung Le Duc Son Thanh Tran Guichon, Jean-Michel Chadebec, Olivier G2Elab ENSE3 Grenoble Elect Engn Lab St Martin Dheres France Hanoi Univ Sci & Technol Sch Elect Engn Dept Elect Power Syst Hanoi Vietnam Hanoi Univ Sci & Technol Int Res Inst Computat Sci & Engn ICSE Hanoi Vietnam Elect Power Univ Dept Elect Engn Hanoi Vietnam CNRS G2ELab Grenoble France
Purpose - The purpose of this paper is to synthesize equivalent circuit obtained from reduced order model of large scale inductive PEEC circuits. Design/methodology/approach - This paper describes an original approach... 详细信息
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modeling and circuit reduction methodology for circuit simulation of DRAM circuits
Modeling and circuit reduction methodology for circuit simul...
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Records of the 1995 IEEE International workshop on Memory Technology, Design and Testing
作者: Kao, William H. Gao, Xiao C. Hamazaki, Ryoji Kikuchi, Hidekazu Cadence Design Systems San Jose United States
As DRAM circuit densities increase, and feature size decrease, circuit simulation of these circuits are becoming increasingly more critical and challenging in order to handle the large circuit capacity (millions of tr... 详细信息
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Symbolic model order reduction
Symbolic model order reduction
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IEEE International workshop on Behavioral modeling and simulation, BMAS 2003
作者: Hu, B.P. Shi, G. Shi, C.-J.R. Mixed-Signal CAD Research Laboratory Department of Electrical Engineering University of Washington SeattleWA98195 United States
Symbolic model order reduction (SMOR) is the problem of reducing a large circuit that contains symbolic circuit parameters to smaller low order models at its ports. Several methods, including symbol isolation, single ... 详细信息
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Real-Time Electromagnetic Visualisation for Large 3D Accelerated models  23
Real-Time Electromagnetic Visualisation for Large 3D Acceler...
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IEEE 23rd workshop on Control and modeling for Power Electronics (COMPEL)
作者: Jalal, Bawar Blakaj, Valon Greedy, Steve Evans, Paul Univ Nottingham PEMC Grp Nottingham England Univ Nottingham GGIEMR Grp Nottingham England
Previous work has shown that real-time electromagnetic models can be used to enable an augmented reality-based visualisation of the magnetic field around a single wire over a ground plane. However, as model complexity... 详细信息
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On synthesis of reduced order models
On synthesis of reduced order models
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workshop on model reduction for circuit simulation
作者: Ionutiu, Roxana Rommes, Joost NXP Semiconductors HTC46-2.08 5656 AE Eindhoven Netherlands
A framework for model reduction and synthesis is presented, which enables the re-use of reduced order models in circuit simulation. Two synthesis techniques are considered for obtaining the circuit representation (net... 详细信息
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model reduction of periodic descriptor systems using balanced truncation
Model reduction of periodic descriptor systems using balance...
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workshop on model reduction for circuit simulation
作者: Benner, Peter Hossain, Mohammad-Sahadet Stykel, Tatjana Fakultät für Mathematik TU Chemnitz 09107 Chemnitz Germany Institut für Mathematik MA 4-5 TU Berlin Straße des 17.Juni 136 10623 Berlin Germany
Linear periodic descriptor systems represent a broad class of time evolutionary processes in micro-electronics and circuit simulation. In this paper, we consider discrete-time linear periodic descriptor systems and st... 详细信息
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Lifetime of CMOS circuits Evaluation by Means of Electro-thermal simulations
Lifetime of CMOS Circuits Evaluation by Means of Electro-the...
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19th International workshop on Thermal Investigations of ICs and Systems (THERMINIC)
作者: Garci, Maroua Kammerer, Jean-Baptiste Hebrard, Luc ICube Strasbourg France
An electro-thermal compact model of MOSFET which takes the hot carriers effects into account is presented in this paper. This new compact model evaluates the threshold voltage shift as well as the mobility reduction i... 详细信息
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