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检索条件"任意字段=Workshop on Model Reduction for Circuit Simulation"
121 条 记 录,以下是31-40 订阅
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model order reduction of nonlinear systems in circuit simulation: Status and applications
Model order reduction of nonlinear systems in circuit simula...
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workshop on model reduction for circuit simulation
作者: Striebel, Michael Rommes, Joost NXP Semiconductors Eindhoven Netherlands
In this paper we review the status of existing techniques for nonlinear model order reduction by investigating how well these techniques perform for typical industrial needs. In particular the Trajectory Piecewise Lin... 详细信息
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A study of battery modeling technologies for vehicle system simulations
A study of battery modeling technologies for vehicle system ...
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IEEE workshop on Computers in Power Electronics
作者: Takayuki Sekisue Koichi Shigematsu Takashi Abe Thanh-Son Dao Technical Division Electrical Business Unit. ANSYS Japan K.K. Tokyo Japan Model Based Development Promotion Division Cybernet Systems Company Limited Nagoya Aichi Japan Division of Electrical Engineering and Computer Science Graduate School of Engineering Nagoya University Nagasaki Japan Application Engineering Division Maplesoft Waterloo Canada
The goal of this research is a proposal of a standard model for vehicle system simulations. Recently, the CO 2 reduction and efficiency improvement of the energy consumption are important subjects in development of t... 详细信息
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Topics in model order reduction with applications to circuit simulation
Topics in model order reduction with applications to circuit...
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workshop on model reduction for circuit simulation
作者: Lefteriu, Sanda Antoulas, Athanasios C. Department of Electrical and Computer Engineering Rice University Houston TX United States
When integrating several components on a chip, one may be faced with the task of combining parts which were not manufactured in house. Oftentimes, no accurate model is available for these constituents. In this scenari... 详细信息
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Balancing-related model reduction of circuit equations using topological structure
Balancing-related model reduction of circuit equations using...
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workshop on model reduction for circuit simulation
作者: Stykel, Tatjana
In recent years, model order reduction has been recognized to be a powerful tool in analysis and simulation of integrated circuits. We consider balancing-related model reduction methods for differential-algebraic equa... 详细信息
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On synthesis of reduced order models
On synthesis of reduced order models
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workshop on model reduction for circuit simulation
作者: Ionutiu, Roxana Rommes, Joost NXP Semiconductors HTC46-2.08 5656 AE Eindhoven Netherlands
A framework for model reduction and synthesis is presented, which enables the re-use of reduced order models in circuit simulation. Two synthesis techniques are considered for obtaining the circuit representation (net... 详细信息
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model reduction of periodic descriptor systems using balanced truncation
Model reduction of periodic descriptor systems using balance...
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workshop on model reduction for circuit simulation
作者: Benner, Peter Hossain, Mohammad-Sahadet Stykel, Tatjana Fakultät für Mathematik TU Chemnitz 09107 Chemnitz Germany Institut für Mathematik MA 4-5 TU Berlin Straße des 17.Juni 136 10623 Berlin Germany
Linear periodic descriptor systems represent a broad class of time evolutionary processes in micro-electronics and circuit simulation. In this paper, we consider discrete-time linear periodic descriptor systems and st... 详细信息
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An Industrial Case Study of Analog Fault modeling
An Industrial Case Study of Analog Fault Modeling
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29th IEEE VLSI Test Symposium (VTS)/workshop on Design for Reliability and Variability (DRV)
作者: Yilmaz, Ender Meixner, Anne Ozev, Sule Arizona State Univ Tempe AZ 85287 USA Intel Corp Hillsboro OR USA
Analog fault modeling (AFM) provides a quantitative measure of quality and insight into defective device behavior. However, the high computational burden typically associated with fault simulation makes it unappealing... 详细信息
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simulation of multiconductor transmission lines using block-latency insertion method and model order reduction technique
Simulation of multiconductor transmission lines using block-...
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8th International workshop on Electromagnetic Compatibility of Integrated circuits, EMC COMPO 2011
作者: Sekine, Tadatoshi Asai, Hideki Dept. of Information Science and Tech. Graduate School of Science and Tech. Shizuoka University 3-5-1 Johoku Naka-ku Hamamatsu-shi 432-8561 Japan Dept. of Systems Eng. Shizuoka University 3-5-1 Johoku Naka-ku Hamamatsu-shi 432-8561 Japan
This paper describes a fast circuit simulation technique based on the block-latency insertion method (block-LIM) and a model order reduction (MOR) technique. The block-LIM is one of the efficient transient analysis me... 详细信息
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Coupling of numerical and symbolic techniques for model order reduction in circuit design
Coupling of numerical and symbolic techniques for model orde...
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workshop on model reduction for circuit simulation
作者: Schmidt, Oliver Halfmann, Thomas Lang, Patrick Fraunhofer ITWM Fraunhofer-Platz 1 67663 Kaiserslautern Germany
In this paper, we will give a short motivation for the use of symbolic methods for model order reduction and present some of these techniques. Furthermore, we will discuss the hierarchy usually at hand for circuit des... 详细信息
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simulation and verification of electronic and biological systems /
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2011年
作者: circuit and Multi-Domain simulation workshop
来源: 内蒙古大学图书馆图书 评论