检索结果-内蒙古大学图书馆

2006 IEEE International Behavioral modeling and simulation workshop, BMAS 2006

ISBN: (纸本)0780397428

The proceedings contain 26 papers. The topics discussed include: variational compact modeling and simulation for linear dynamic systems;statistical gate level simulation via voltage controlled current source models;behavioral-level performance modeling of analog and mixed-signal systems using support vector machines;mixed modeling of SAW delay line using VHDL;macro-model of spin-transfer torque based magnetic tunnel junction device for hybrid magnetic-CMOS design;an extended SVD-based terminal and model order reduction algorithm;a referenced geometry based configuration scalable Mextram model for bipolar transistors;modeling of spring constant and pull-down voltage of non-uniform RF MEMS cantilever;SCISIP-program for switched circuit analysis in Matlab;event-driven modeling and simulation of a digital PLL;simulation of power grid networks considering wires and lognormal leakage current variations;and SPICE modeling of free-space optical systems.

关键词： Linear systems

来源：评论

学校读者我要写书评

暂无评论

Switching activity reduction of MAC-Based FIR filters with correlated input data

引用

17th International workshop on Power and Timing modeling, Optimization and simulation

作者： Gustafson, Oscar Oskuii, Saeeid Tahmasbi Johansson, Kenny Kjeldsberg, Per Gunnar Linkoping Univ Dept Elect Engn SE-58183 Linkoping Sweden Norwegian Univ Sci & Technol NTNU Dept Electron & Telecommun NO-7491 Trondheim Norway

ISBN: (纸本)9783540744412

In this work we consider coefficient reordering for low power realization of FIR filters on fixed-point multiply-accumulate (MAC) based architectures, such as DSP processors. Compared to previous work we consider the input data correlation in the ordering optimization. For this we model the input data using the dual bit type approach. Results show that compared with just optimizing the number of switches between coefficients, the proposed method works better when the input data is correlated, which can be assumed for most applications.

关键词： FIR filter MAC dual bit type switching activity coefficient reordering

来源：评论

学校读者我要写书评

暂无评论

Application of RADSAFE to model the single event upset response of a 0.25 μm CMOS SRAM

Application of RADSAFE to model the single event upset respo...

引用

9th European workshop on Radiation and its Effects on Components and Systems

作者： Warren, Kevin M. Weller, Robert A. Sierawski, Brian D. Reed, Robert A. Mendenhall, Marcus H. Schrimpf, Ronald D. Massengill, Lloyd W. Porter, Mark E. Wilkinson, Jeffrey D. Label, Kenneth A. Adams, James H. Inst Space & Defense Elect Nashville TN 37203 USA Vanderbilt Univ Dept Elect Engn & Comp Sci Nashville TN 37203 USA Vanderbilt Univ Free Elect Laser Ctr Nashville TN 37203 USA Medtron Microelect Ctr Inc Tempe AZ USA Medtron CRDM Device Technol Minneapolis MN USA NASA Goddard Space Flight Ctr Greenbelt MD 20771 USA NASA George C Marshall Space Flight Ctr NSSTC Huntsville AL 35805 USA

The RADSAFE simulation framework is described and applied to model SEU in a 0.25 mu m CMOS 4 Mbit SRAM. For this circuit, the RADSAFE approach produces trends similar to those expected from classical rectangular paral... 详细信息

关键词： GEANT4 heavy-ion RADSAFE SEU TCAD

来源：评论

学校读者我要写书评

暂无评论

Proceedings - 10th IEEE workshop on Signal Propagation on Interconnects, SPI 2006

Proceedings - 10th IEEE Workshop on Signal Propagation on In...

引用

10th IEEE workshop on Signal Propagation on Interconnects, SPI 2006

ISBN: (纸本)1424404541

The proceedings contain 65 papers. The topics discussed include: application of the conjugate gradient technique to stripline packaging problems;passive rational function fitting of a driving-point impedance from its real part;global routing for force directed placement;analysis based reduction using sensitivity analysis;statistical variations of interconnect parasitics: extraction and circuit simulation;package model for efficient simulation, design, and characterization of high performance electronic systems;the impact of leakage to the power supply impedance of a microprocessor;measurement of worst-case power delivery noise on chip under operating conditions;modeling of the IC's switching currents on the power bus of a high speed digital board;delay and crosstalk on future 32nm node interconnects: impact of ULK-air-gap architecture;and analysis and design of electromagnetic bandgap (EBG) structures for power plane isolation using dispersion diagrams and scalability.

关键词： Signal processing

来源：评论

学校读者我要写书评

暂无评论

Provably passive second order model order reduction for package parasitics using spectral zeros

Provably passive second order model order reduction for pack...

引用

Annual IEEE Northeast workshop on circuits and Systems (NEWCAS)

作者： Mehboob Alam Arthur Nieuwoudt Yehia Massoud Rice Automated Nanoscale Design Group ECE Department Rice University Houston TX USA

In this paper, we developed an accurate and provably passive second order method for the model order reduction of passive circuit models in high performance integrated circuits. The method dynamically selects interpolation points from the system's spectral zeros and provides an automated means to simultaneously guarantee stability and passivity while generating low order models that are accurate across a specified range of frequencies. The results demonstrate that our approach provides more accurate reduced order models than second-order Krylov subspace methods.

关键词： Inductance Integrated circuit modeling Frequency Interpolation circuit simulation Integrated circuit interconnections Conductors Integrated circuit packaging Crosstalk Bonding

来源：评论

学校读者我要写书评

暂无评论

Digital FIR Filter Optimization Using Toggle-Based Power Estimation Tools

Digital FIR Filter Optimization Using Toggle-Based Power Est...

引用

Proceedings of the IEEE Dallas circuits and Systems workshop (DCAS)

作者： Cristian M. Albina Gunther Hackl GME mbH Unterhaching Germany

In this paper one method of optimizing a digital finite impulse response (FIR) filter has been illustrated. The advantages and disadvantages of several architectures and of the circuit modeling were presented using a standard toggle-based method for the circuit power estimation, gate-level simulations and synthesis. We showed that we can achieve a significant power reduction from the beginning by carefully selecting the right architecture and optimizing the VHDL code description of the module. The analysis was made based on the unity delay model and not on the physical extracted layout for a 150nm technology but the method can be used for other technologies as well.

关键词： Finite impulse response filter Digital filters circuit simulation Clocks Digital signal processing chips Energy consumption Semiconductor device modeling IIR filters Optimization methods circuit synthesis

来源：评论

学校读者我要写书评

暂无评论

Design methodology and model generation for complex analog blocks

引用

14th workshop on Advances in Analog circuit Design

作者： Gielen, G Katholieke Univ Leuven ESAT MICAS B-3001 Heverlee Belgium

ISBN: (纸本)1402038844

An overview is presented of the design methodology and related modeling needs for complex analog and RF blocks in mixed-signal integrated systems (ASICs, SoCs, SiPs). The design of these integrated systems is characterized by growing design complexities and shortening time to market constraints. Handling these requires mixed-signal design methodologies and flows that include system-level architectural explorations and hierarchical design refinements with behavioral models in the top-down design path, and detailed behavioral model extraction and efficient mixed-signal behavioral simulation in the bottom-up verification path. Techniques to generate analog behavioral models, including regression-based methods as well as model-order reduction techniques, are described in detail. Also the generation of performance models for analog circuit synthesis and of symbolic models that provide designers with insight in the relationships governing the performance behavior of a circuit are described.

关键词： Integrated control

来源：评论

学校读者我要写书评

暂无评论

Time domain analog circuit simulation

引用

JOURNAL OF COMPUTATIONAL AND APPLIED MATHEMATICS 2006年第2期185卷 441-459页

作者： Fijnvandraat, JG Houben, SHMJ ter Maten, EJW Peters, JMF Philips Res Labs Eindhoven Netherlands Eindhoven Univ Technol ED&T AS NL-5656 AA Eindhoven Netherlands Magma Design Automat Eindhoven Netherlands

Recent developments of new methods for simulating electric circuits are described. Emphasis is put on methods that fit existing datastructures for backward differentiation formulae methods. These methods can be modified to apply to hierarchically organized datastructures, which allows for efficient simulation of large designs of circuits in the electronics industry. (c) 2005 Elsevier B.V. All rights reserved.

关键词： transient analysis modified nodal analysis differential-algebraic equations hierarchical datastructures recursion BDF Radau Rosenbrock-Wanner MEBDF parallelism model reduction table modeling multi-rate multi-tone mixed-signal mixed-level

来源：评论

学校读者我要写书评

暂无评论

Adaptive coding in Networks-on-Chip: Transition activity reduction versus power overhead of the codec circuitry

引用

16th International workshop on Power and Timing modeling, Optimization and simulation

作者： Palma, Jose C. S. Indrusiak, Leandro Soares Moraes, Fernando G. Ortiz, Alberto Garcia Glesner, Manfred Reis, Ricardo A. L. UFRGS PPGC II BR-9500 Porto Alegre RS Brazil TU Darmstadt MES D-64283 Darmstadt Germany PUCRES FACIN PPGCC Porto Alegre RS Brazil

ISBN: (纸本)3540390944

This work investigates the reduction of power consumption in Networks-on-Chip (NoCs) through the reduction of transition activity using data coding schemes. The estimation of the NoC power consumption is performed with basis on macromodels which reproduce the power consumption on each internal NoC module according to the transition activity on its input ports. Such macromodels are embedded in a system model and a series of simulations are performed, aiming to analyze the trade-off between the power savings due to coding schemes versus the power consumption overhead due to the encoding and decoding modules.

关键词： Microprocessor chips

来源：评论

学校读者我要写书评

暂无评论

Time domain analog circuit simulation

Time domain analog circuit simulation

引用

International workshop on the Technological Aspects of Mathematics

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：