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9th workshop on parallel Programming and Run-time Management Techniques for Many-Core Architectures (PARMA) / 7th workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (DITAM)

作者： Cima, Vojtech Bohm, Stanislav Martinovic, Jan Dvorsky, Jiri Janurova, Katerina Vander Aa, Tom Ashby, Thomas J. Chupakhin, Vladimir IT4Innovations Ostrava Czech Republic IMEC Leuven Belgium Janssen Pharmaceut NV Computat Biol Discovery Sci Beerse Belgium

ISBN: (纸本)9781450364447

real-world scientific applications often encompass end-to-end data processing pipelines composed of a large number of interconnected computational tasks of various granularity. We introduce Hyper-Loom, an open source platform for defining and executing such pipelines in distributed environments and providing a Python interface for defining tasks. HyperLoom is a self-contained system that does not use an external scheduler for the actual execution of the task. We have successfully employed HyperLoom for executing chemogenomics pipelines used in pharmaceutic industry for novel drug discovery.

关键词： HPC Scientific Pipeline Machine Learning Big Data distributed Computing Chemogenomics Task Scheduling

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Work-In-Progress: Incorporating Deadline-Based Scheduling in Tasking Programming Model for Extreme-Scale parallel Computing 39

Work-In-Progress: Incorporating Deadline-Based Scheduling in...

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39th IEEE real-time systems Symposium (RTSS)

作者： Cheng, Albert M. K. Wu, Panruo Univ Houston Dept Comp Sci Houston TX 77004 USA

ISBN: (纸本)9781538679081

Processing and analyzing big data sets updated in real time in an increasing number of applications such as severe weather prediction and particle-physics experiments require the computational power of extreme-scale high-performance computing (HPC) systems. To address the scheduling of massive task/thread sets on these extreme-scale systems, current strategies rely on improving centralized, distributed, and parallel scheduling algorithms as well as virtualization developed for HPC systems which aim to reduce the makespan and balance the load among the computing nodes in these systems. However, these HPC schedulers provide no guarantees on meeting timing constraints such as deadlines that are required in an increasing number of these real-time science workflows. This paper describes a new project which departs from this established trend of best-effort scheduling of large-scale HPC Message Passing Interface (MPI) tasks and ensemble workloads found in fine-grain many-task computing (MTC) applications. The new approach brings real-time scheduling to address the demands of real-time science workloads. This new framework abstracts information about the tasks or threads, and continuously dispatch this workload to meet deadlines and other timing constraints associated with individual tasks or groups of tasks in extreme-scale HPC systems to reduce execution time and energy consumption. This paper introduces deadline-based scheduling in the tasking programming model.

关键词： Task analysis real-time systems Computational modeling Programming Scheduling algorithms

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PERFORMANCE ANALYSIS OF parallel/distributed PARTICLE FILTERS 18

PERFORMANCE ANALYSIS OF PARALLEL/DISTRIBUTED PARTICLE FILTER...

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4th ACM International Conference of Computing for Engineering and Sciences (ICCES)

作者： Zhang, Xudong Mohamed, Ali Nguyen, Linda Gu, Feng CUNY Grad Ctr Dept Comp Sci 365 5th Ave New York NY 10016 USA CUNY Coll Staten Isl Dept Comp Sci 2800 Victory Blvd Staten Isl NY 10314 USA San Jose State Univ Dept Comp Engn One Washington Sq San Jose CA 95192 USA

ISBN: (纸本)9781450321389

Simulation models are widely used to study various systems. However, many of them lack of accuracy without incorporating real time data from the system under study. Particle filters can be used to assimilate real time data into dynamic systems to improve state inferences. parallel/distributed particle filters were introduced by deploying particles among multiple processing units (PUs) to improve the performance. In parallel/distributed particle filters, the resampling process needs particle exchanging among PUs, which affects the speedup factor of parallel computing. Therefore, efficient particle routing policies are necessary to improve the performance. In this paper, we analyze the performance of parallel/distributed particle filters with three different particle routing policies. The analysis is able to provide the guidelines in optimizing the resampling strategies and applications. The simulation and experimental results showed the relationship between the speedup factor and system inherent complexity, the dimension of particle, and the number of PUs.

关键词： Particle filters Sequential Monte Carlo (SMC) methods performance analysis particle routing policy time complexity

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distributed SDN Architecture for NoC-based Many-core SoCs 19

Distributed SDN Architecture for NoC-based Many-core SoCs

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13th IEEE/ACM International Symposium on Networks-on-Chip (NOCS)

作者： Ruaro, Marcelo Velloso, Nedison Jantsch, Axel Moraes, Fernando G. Pontificia Univ Catolica Rio Grande do Sul Porto Alegre RS Brazil TU Wien Vienna Austria

ISBN: (纸本)9781450367004

In the Software-Defined Networking (SDN) paradigm, routers are generic and programmable forwarding units that transmit packets according to a given policy defined by a software controller. Recent research has shown the potential of such a communication concept for NoC management, resulting in hardware complexity reduction, management flexibility, real-time guarantees, and self-adaptation. However, a centralized SDN controller is a bottleneck for large-scale systems. Assuming an NoC with multiple physical subnets, this work proposes a distributed SDN architecture (D-SDN), with each controller managing one cluster of routers. Controllers work in parallel for local (intra-cluster) paths. For global (inter-cluster) paths, the controllers execute a synchronization protocol inspired by VLSI routing, with global and detailed routing phases. This work also proposes a short path establishment heuristic for global paths that explores the controllers' parallelism. D-SDN outperforms a centralized approach (C-SDN) for larger networks without loss of success rate. Evaluations up to 2,304 cores and 6 subnets shows that: (i) D-SDN outperforms C-SDN in path establishment latency up to 69.7% for 1 subnet above 32 cores, and 51% for 6 subnets above 1,024 cores;(ii) D-SDN achieves a smaller latency then C-SDN (on average 54%) for scenarios with more than 70% of local paths;(iii) the path success rate, for all scenarios, is similar in both approaches, with an average difference of 1.7%;(iv) the data storage for the C-SDN controller increases with the system size, while it remains constant for D-SDN.

关键词： Network-on-Chip (NoC) Software-Defined Networking (SDN) distributed Management System-on-Chip (SoC) Many-core

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On the Feasibility of Hybrid Electrical/Optical Switch Architecture for Large-Scale Training of distributed Deep Learning

On the Feasibility of Hybrid Electrical/Optical Switch Archi...

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IEEE/ACM workshop on Photonics-Optics Technology Oriented Networking, Information and Computing systems (PHOTONICS)

作者： Truong Thao Nguyen Ryousei Takano AIST-Tokyo Tech Real World Big-Data Computation Open Innovation Laboratory (RWBC-OIL) National Institute of Advanced Industrial Science and Technology (AIST) Tokyo Japan

ISBN: (纸本)9781728159829

Data parallelism is the dominant method used to train deep learning (DL) model on High-Performance Computing systems such as large-scale GPU clusters. When training a DL model on a large number of nodes, inter-node communication becomes bottle-neck due to its relatively higher latency and lower link bandwidth (than intra-node communication). To cope with this problem, some techniques have been proposed to (a) optimize the collective communication algorithms that take into account the network topology, (b) reduce the message size, and (c) overlap the communication and computation. All of these approaches target to deal with the large message size issue while diminishing the effect of the limitation of the inter-node network. In this study, we investigate the benefit of increasing inter-node link bandwidth by using the hybrid switching systems, i.e., Electrical Packet Switching and Optical Circuit Switching. We found that the typical data-transfer of synchronous data-parallelism training are long-live and rarely changed that can be speed-up with optical switching. Simulation results on Simgrid simulator show that our approach speed-up the training time of deep learning application around 10%.

关键词： distributed deep learning High performance computing (HPC) Optical circuit switching Hybrid switching Communication Research data parallel Training Functional training HYBRID Speeding approach speed data transmission

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PERFORMANCE ANALYSIS OF parallel/distributed PARTICLE FILTERS

PERFORMANCE ANALYSIS OF PARALLEL/DISTRIBUTED PARTICLE FILTER...

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Spring Symposium on Theory of Modeling and Simulation (SpringSim-TMS)

ISBN: (纸本)9781510860209

关键词： Particle filters Sequential Monte Carlo (SMC) methods performance analysis particle routing policy time complexity

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cuBool: Bit-parallel Boolean Matrix Factorization on CUDA-enabled Accelerators 24

cuBool: Bit-Parallel Boolean Matrix Factorization on CUDA-en...

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24th IEEE International Conference on parallel and distributed systems (ICPADS)

作者： Kobus, Robin Lamoth, Adrian Mueller, Andre Hundt, Christian Kramer, Stefan Schmidt, Bertil Johannes Gutenberg Univ Mainz Mainz Germany

ISBN: (纸本)9781538673089

Boolean Matrix Factorization (BMF) is a commonly used technique in the field of unsupervised data analytics. The goal is to decompose a ground truth matrix C into a product of two matrices A and B being either an exact or approximate rank k factorization of C. Both exact and approximate factorization are time-consuming tasks due to their combinatorial complexity. In this paper, we introduce a massively parallel implementation of BMF - namely cuBool - in order to significantly speed up factorization of huge Boolean matrices. Our approach is based on alternately adjusting rows and columns of A and B using thousands of lightweight CUDA threads. The massively parallel manipulation of entries enables full usage of all available cores on modern CUDA-enabled GPUs. Additionally, modelling up to 32 consecutive entries of the Boolean matrices A, B and C as 32-bit integer results in fewer data accesses and faster computation of inner products. This bit-parallel approach allows for a significant decrease of memory requirements in contrast to gradient-based continuous updates of entries on dense representations. cuBool is compared to other state-of-the-art matrix factorization algorithms. Experiments on a number of real-world data sets show highly competitive results at only a fraction of computation time. cuBool proves to be a good compromise between low run time and a high-quality factorization for the decomposition of large-scale Boolean matrices. It can freely be accessed under https://***/funatiq/cubool.

关键词： Data milling CUDA matrix factorization massively parallel computing

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An Overview on the Convergence of High Performance Computing and Big Data Processing 24

An Overview on the Convergence of High Performance Computing...

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24th IEEE International Conference on parallel and distributed systems (ICPADS)

作者： Mei, Songzhu Guan, Hongtao Wang, Qinglin Natl Univ Def Technol Sci & Technol Parallel & Distributed Lab Changsha Hunan Peoples R China Natl Univ Def Technol Sch Comp Changsha Hunan Peoples R China

ISBN: (纸本)9781538673089

At present, with the rapid development of big data processing technology, streaming data processing and real-time data analysis have gradually become new research hotspots. Both the industry and the academia have invested a lot of research into the efficient processing methods of massive data generated in the environment such as the Internet and e-commerce. Meanwhile, high-performance computing technology and supercomputers are also looking for new business growth points. The convergence of big data processing and high performance computing technology is the general trend of big data analysis in the future. This paper will give a brief overview of typical technologies in the fusion process of big data processing and high-performance computing.

关键词： high performance computing big data convergence high performance data analysis

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Gaussian Model Trees for Traffic Imputation 8th

Gaussian Model Trees for Traffic Imputation

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8th International Conference on Pattern Recognition Applications and Methods (ICPRAM)

作者： Buschjaeger, Sebastian Liebig, Thomas Morik, Katharina TU Dortmund Univ Artificial Intelligence Unit Dortmund Germany

ISBN: (纸本)9789897583513

Traffic congestion is one of the most pressing issues for smart cities. Information on traffic flow can be used to reduce congestion by predicting vehicle counts at unmonitored locations so that counter-measures can be applied before congestion appears. To do so pricy sensors must be distributed sparsely in the city and at important roads in the city center to collect road and vehicle information throughout the city in real-time. Then, Machine Learning models can be applied to predict vehicle counts at unmonitored locations. To be fault-tolerant and increase coverage of the traffic predictions to the suburbs, rural regions, or even neighboring villages, these Machine Learning models should not operate at a central traffic control room but rather be distributed across the city. Gaussian Processes (GP) work well in the context of traffic count prediction, but cannot capitalize on the vast amount of data available in an entire city. Furthermore, Gaussian Processes are a global and centralized model, which requires all measurements to be available at a central computation node. Product of Expert (PoE) models have been proposed as a scalable alternative to Gaussian Processes. A PoE model trains multiple, independent GPs on different subsets of the data and weight individual predictions based on each experts uncertainty. These methods work well, but they assume that experts are independent even though they may share data points. Furthermore, PoE models require exhaustive communication bandwidth between the individual experts to form the final prediction. In this paper we propose a hierarchical Product of Expert model, which consist of multiple layers of small, independent and local GP experts. We view Gaussian Process induction as regularized optimization procedure and utilize this view to derive an efficient algorithm which selects independent regions of the data. Then, we train local expert models on these regions, so that each expert is responsible for a given region.

关键词： Gaussian Processes Ensemble Product of Experts parallel

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Incremental Flow Scheduling and Routing in time-Sensitive Software-Defined Networks

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IEEE TRANSACTIONS ON INDUSTRIAL INFORMATICS 2018年第5期14卷 2066-2075页

作者： Nayak, Naresh Ganesh Duerr, Frank Rothermel, Kurt Univ Stuttgart Inst Parallel & Distributed Syst D-70174 Stuttgart Germany

Several networking architectures have been developed atop IEEE 802.3 networks to provide real-time communication guarantees for time-sensitive applications in industrial automation systems. The basic principle underlying these technologies is the precise transmission scheduling of time-triggered traffic through the network for providing deterministic and bounded latency and jitter. These transmission schedules are typically synthesized offline (computational time in the order of hours) and remain fixed thereafter, making it difficult to dynamically add or remove network applications. This paper presents algorithms for incrementally adding time-triggered flows in a time-sensitive software-defined network (TSSDN). The TSSDN is a network architecture based on software-defined networking, which provides real-time guarantees for time-triggered flows by scheduling their transmissions on the hosts (network edge) only. These algorithms exploit the global view of the control plane on the data plane to schedule and route time-triggered flows needed for the dynamic applications in the Industrial Internet of Things (Industry 4.0). The evaluations show that these algorithms can compute incremental schedules for time-triggered flows in subseconds with an average relative optimality of 68%.

关键词： Industrial networks integer linear programming software-defined networking

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