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International workshop/Symposium on distributed Simulation and real-time Applications (DS-RT)

作者： Azzedine Boukerche FiEEE. FEiC FCAE FAAAS Distinguished University Professor Canada Research Chair Tier-1 Scientific Director of DIVA Strategic Research Network Director of CREATE-TRANSIT Network University of Ottawa Canada

Every year, natural and human-induced disasters result in infrastructural damages, monetary costs, distresses, injuries and deaths. Unfortunately, climate change is strengthening the destructive power of natural disasters. In this context, distributed simulation-based disaster management and response systems have been proposed to cope with disasters and emergencies by training first responder with the latest ICT technology, and improving the disaster detection and search/rescue missions during disaster response. With the recent advances in wireless communication, and the proliferation of portable computer and micro-sensor devices, we are witnessing a growing interest in using wireless multimedia sensor networks and collaborative virtual environment technologies for safety and security class of applications. In this talk, we will give an overview of some research projects related to smart emergency preparedness and response that are currently being investigated at the PARADISE Research Laboratory at the Ottawa. We will show how collaborative virtual environment, context aware computing, wireless multimedia, and wireless sensor networks can be used to ensure public safety and security. We will focus upon the design of large-scale distributed simulation system for applications that require critical condition monitoring using both location/context aware computing and wireless sensor technologies. The second part of the talk will conclude by presenting two testbeds that are currently under development at PARADISE: the LIVE testbed, and the SWiMNet testbed. LIVE is a testbed for applications that require emergency preparedness and response. LIVE's architecture integrates wireless sensor networks with wireless multimedia and virtual environment technologies. SWiMNet is a testbed of a high-performance simulation system that supports very detailed and realistic model specifications to enable the design and evaluation of new protocols and applications for future generations o

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Toward contention analysis for parallel executing real-time tasks 18

Toward contention analysis for parallel executing real-time ...

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18th International workshop on Worst-Case Execution time Analysis, WCET 2018

作者： Guet, Fabrice Santinelli, Luca Morio, Jérôme Phavorin, Guillaume Jenn, Eric ONERA - The French Aerospace Lab Toulouse France IRT Saint Exupery Toulouse France

ISBN: (纸本)9783959770736

In measurement-based probabilistic timing analysis, the execution conditions imposed to tasks as measurement scenarios, have a strong impact to the worst-case execution time estimates. The scenarios and their effects on the task execution behavior have to be deeply investigated. The aim has to be to identify and to guarantee the scenarios that lead to the maximum measurements, i.e. the worst-case scenarios, and use them to assure the worst-case execution time estimates. We propose a contention analysis in order to identify the worst contentions that a task can suffer from concurrent executions. The work focuses on the interferences on shared resources (cache memories and memory buses) from parallel executions in multi-core real-time systems. Our approach consists of searching for possible task contenders for parallel executions, modeling their contentiousness, and classifying the measurement scenarios accordingly. We identify the most contentious ones and their worst-case effects on task execution times. The measurement-based probabilistic timing analysis is then used to verify the analysis proposed, qualify the scenarios with contentiousness, and compare them. A parallel execution simulator for multi-core real-time system is developed and used for validating our framework. The framework applies heuristics and assumptions that simplify the system behavior. It represents a first step for developing a complete approach which would be able to guarantee the worst-case behavior. © Fabrice Guet, Luca Santinelli, Jérôme Morio, Guillaume Phavorin, and Eric Jenn.

关键词： real time systems

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parallel Model Checking on Pushdown systems 16

Parallel Model Checking on Pushdown Systems

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16th IEEE ISPA / 17th IEEE IUCC / 8th IEEE BDCloud / 11th IEEE SocialCom / 8th IEEE SustainCom

作者： Wei, Hansheng Chen, Xinyu Ye, Xin Fu, Neng Huang, Yanhong Shi, Jianqi East China Normal Univ Natl Trusted Embedded Software Engn Technol Res C Shanghai Peoples R China Hardware Software Codesign Technol & Applicat Eng Shanghai Peoples R China Shanghai Key Lab Trustworthy Comp Shanghai Peoples R China LIPN Paris France Paris Univ 7 Paris France

ISBN: (纸本)9781728111414

Pushdown systems (PDSs) have been widely used in program verification, such as recursive programs, malware detection, and other model-checking problems. As programs become more complicated, the model-checking process of PDSs represents a real challenge, which is the well-known state explosion problem. This problem may be cost expensive both in terms of memory and time. parallel computing has been introduced to overcome this limitation, especially GPU computing. In this paper, we propose novel parallel algorithms to accelerate model checking on PDSs according to the characteristics of automata-theoretic. To represent the model-checking process on parallel architectures, we propose two new models: multi-threaded P-automaton and multi-threaded Buchi pushdown systems. Moreover, we design a highly efficient data structure for PDSs and dynamic task management to accommodate the GPU. Compared with Moped, a popular model checker for PDSs, our approach achieves promising performance.

关键词： CUDA GPU Model Checking parallel computing Pushdown systems

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Efficient GPU-Based Electromagnetic Transient Simulation for Power systems With Thread-Oriented Transformation and Automatic Code Generation

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IEEE ACCESS 2018年 6卷 25724-25736页

作者： Song, Yankan Chen, Ying Huang, Shaowei Xu, Yin Yu, Zhitong Xue, Wei Tsinghua Univ Dept Elect Engn Beijing 100084 Peoples R China Beijing Jiaotong Univ Sch Elect Engn Beijing 100044 Peoples R China Tsinghua Univ Energy Internet Res Inst Chengdu 610213 Sichuan Peoples R China Tsinghua Univ Dept Comp Sci & Technol Beijing 100084 Peoples R China

Electromagnetic transients (EMT) simulation is the most accurate and intensive computation for power systems. Past research has shown the potential of accelerating such simulations using graphics processing units (GPUs). In this paper, an efficient GPU-based parallel EMT simulator is designed. Thread-oriented model transformations are first proposed for the electrical and control systems. Following the transformations, the electrical system is represented by connected networks of massive primitive electrical elements, the computations of which can be constructed as massive fused multiply-add operations and solutions to a linear equation. The control systems are represented by a layered directed acyclic graph with primitive control elements that can be dealt with using single-instruction-multiple-threads groups. Finally, code automation tools are designed to form the GPU kernels. Compared with past work, the proposed model transformations improve the degree of parallelism. Most importantly, the code automation tools improve computational efficiency by substantially reducing addressing and memory access, and render the implementation of the algorithm more general and convenient. Test systems of different sizes were created by connecting multiple IEEE 33-bus distribution systems and adding distributed generators. Simulations were performed on NVIDIA's K20x and P100 cards. The results indicate that the proposed method significantly accelerates EMT simulations compared with a CPU-based program. real-time performance was also achieved under certain conditions.

关键词： Electromagnetic transients simulation EMTP GPU parallel computing power system

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Energy-Efficient Actor Execution for SDF Application on Heterogeneous Architectures 26

Energy-Efficient Actor Execution for SDF Application on Hete...

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26th Euromicro International Conference on parallel, distributed, and Network-Based Processing (PDP)

作者： Rexha, Hergys Lafond, Sebastien Desnos, Karol Abo Akad Univ Fac Sci & Engn Turku Finland Turku Ctr Comp Sci Turku Finland UBL IETR INSA Rennes UMR CNRS 6164 Rennes France

ISBN: (纸本)9781538649756

Heterogeneous systems promise to improve performance and endurance of power constrained systems, by utilizing computing elements of different power and performance characteristics. Such systems provide the possibility to trade number and types of core with Dynamic Voltage and Frequency Scaling (DVFS) levels and core utilization rate to achieve optimal energy efficiency. Therefore by making smart decisions on application scheduling and mapping we can exploit and maximize the benefits of using heterogeneous processors. At the same time, the application level of parallelism can conveniently be exposed by dataflow Models of Computation (MoCs). In this paper we show an energy efficient execution approach for heterogeneous architecture. We demonstrate the approach on a real-life streaming application modelled with Parameterized and Interfaced Synchronous Dataflow (PiSDF). The presented solution shows how to integrate our approach in the workflow of a dataflow application prototyping tool. The obtained results demonstrate that, by using an optimal scheduling and mapping, more than 30% of energy reduction can be achieved on a single actor level.

关键词： Computer architecture Task analysis parallel processing Computational modeling Schedules Rapid prototyping Tools

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System on fabrics utilising distributed computing

System on fabrics utilising distributed computing

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作者： Kandaswamy, Partheepan Loughborough University

学位级别：博士

The main vision of wearable computing is to make electronic systems an important part of everyday clothing in the future which will serve as intelligent personal assistants. Wearable devices have the potential to be wearable computers and not mere input/output devices for the human body. The present thesis focuses on introducing a new wearable computing paradigm, where the processing elements are closely coupled with the sensors that are distributed using Instruction Systolic Array (ISA) architecture. The thesis describes a novel, multiple sensor, multiple processor system architecture prototype based on the Instruction Systolic Array paradigm for distributed computing on fabrics. The thesis introduces new programming model to implement the distributed computer on fabrics. The implementation of the concept has been validated using parallel algorithms. A real-time shape sensing and reconstruction application has been implemented on this architecture and has demonstrated a physical design for a wearable system based on the ISA concept constructed from off-the-shelf microcontrollers and sensors. Results demonstrate that the real time application executes on the prototype ISA implementation thus confirming the viability of the proposed architecture for fabric-resident computing devices.

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Effectiveness of Moldable and Malleable Scheduling in Deep Learning Tasks 24

Effectiveness of Moldable and Malleable Scheduling in Deep L...

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24th IEEE International Conference on parallel and distributed systems (ICPADS)

作者： Fujiwara, Ikki Tanaka, Masahiro Taura, Kenjiro Torisawa, Kentaro Natl Inst Informat & Commun Technol NICT Universal Commun Res Inst Data Driven Intelligent Syst Res Ctr DIRECT 3-5 Hikaridai Seika Kyoto 6190289 Japan Univ Tokyo Grad Sch Informat Sci & Technol Dept Informat & Commun Engn Bunkyo Ku 7-3-1 Hongo Tokyo 1130033 Japan

ISBN: (纸本)9781538673089

Research and development of deep learning (DL) applications often involves exhaustive trial-and-error, which demands that shared computational resources, especially GPUs, be efficiently allocated. Most DL tasks are moldable or malleable (i.e., the number of allocated GPUs can be changed before or during execution). However, conventional batch schedulers do not take advantage of DL tasks' moldability/malleability, inhibiting speedup when some GPU resources are unallocated. Another opportunity for speedup is to run multiple tasks concurrently on one GPU, which may improve the overall throughput because a single task does not always fully utilize the GPU's computational resources. We propose designing a batch scheduling system that exploits these opportunities to accelerate DL tasks. As a first step, this study conducts an extensive case study to evaluate the speedup of DL tasks when a scheduler treats them as moldable or malleable. That is, the scheduler adjusts the number of GPUs to be (or already) allocated to a task in response to the fluctuating availability of GPUs. Simulations using our real workload trace show that if the scheduler can allocate 1-4 GPUs to a task or assign 1-4 tasks to a GPU, then the average flow time of moldable/malleable DL tasks is shortened by at least 15.1 %/42.5%, respectively, compared to a Rigid FCFS schedule in which one GPU is allocated to each task.

关键词： Task analysis Graphics processing units Artificial neural networks parallel processing Training Runtime Scheduling

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Compiler-driven performance workshop 19

Compiler-driven performance workshop

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Proceedings of the 29th Annual International Conference on Computer Science and Software Engineering

作者： Clark Verbrugge J. Nelson Amaral Reid Copeland Whitney T. Tsang McGill University Montréal Quebec Canada University of Alberta Edmonton Alberta Canada IBM Toronto Laboratory Markham Ontario Canada

The compiler-driven performance workshop consisted of the presentation of reports on research progress at various academic and industrial sites across Canada and in the United States. Topics discussed in the workshop included, among others:• innovative compiler analysis, transformation, and optimization techniques• languages, compilers, and optimization techniques for multi-core processors and other parallel architectures• analysis and compilation techniques for dynamic programming languages• compiling for streaming or heterogeneous hardware• dynamic compilation for high-performance and real-time environments• compilation and optimization for scripting languages• compilation techniques for reducing power• program safety• whole system optimization and analysis• tools and infrastructure for compiler research

关键词： compilers optimization runtime systems parallelism performance

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Emergent Scheduling of distributed Execution Frameworks

Emergent Scheduling of Distributed Execution Frameworks

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IEEE International workshops on Foundations and Applications of Self systems

作者： Paul Allan Dean Barry Porter Lancaster University Lancaster UK Lancaster University Lancaster Lancashire GB

distributed execution Frameworks (DEFs) provide a platform for handling the increasing volume of data available to distributed computational processes, forming the creation and usage of a large number of DEFs for performing distributed computations. For example, sorting and analyzing large data sets through map and reduce operations, performing a set of operations across points in a data stream to provide near real-time analysis, and the training and testing of machine learning models for varying methods of learning, such as, supervised, unsupervised and reinforcement learning, exploiting the vast amounts of data available. Leading to varying DEFs becoming optimal for either fine or coarse grained computations, for example Apache Spark provides a framework for coarse grained data parallel processes providing data locality adding latency to scheduling decisions which would hinder performance of fine-grained computation. Whereas Ray and Apache Flink provide solutions to avoid the latency incurred by the scheduling method used by apache Spark while potentially incurring longer job completion times as data locality is no longer a priority. Therefore, this PhD will focus on overcoming the issue of trading performance for differing workloads by exploiting the capabilities presented by emergent software systems which learn how to assemble and re-assemble themselves in response to their current deployment conditions and input pattern. This allows the creation of a component based DEF capable of altering both the local behaviour of a DEF (i.e. Local Schedulers and placement polices within a centralised scheduler) to potentially improve the performance of single DEF as well as global behaviour of a DEF, for example the adaptation of a centralised to two-level scheduler.

关键词： Reinforcement learning Task analysis Cluster computing Processor scheduling real-time systems Training

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A Fast Scalable Implicit Solver with Concentrated Computation for Nonlinear time-evolution Problems on Low-order Unstructured Finite Elements 32

A Fast Scalable Implicit Solver with Concentrated Computatio...

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27th International Heterogeneity in Computing workshop in conjunction with 32nd IEEE International parallel and distributed Processing Symposium (IPDPS)

作者： Ichimura, Tsuyoshi Fujita, Kohei Horikoshi, Masashi Meadows, Larry Nakajima, Kengo Yamaguchi, Takuma Koyama, Kentaro Inoue, Hikaru Naruse, Akira Katsushima, Keisuke Hori, Muneo Lalith, Maddegedara Univ Tokyo Earthquake Res Inst Tokyo Japan Univ Tokyo Dept Civil Engn Tokyo Japan RIKEN Adv Inst Computat Sci Kobe Hyogo Japan Intel KK Software & Solut Grp Tokyo Japan Intel Corp Data Ctr Grp Hillsboro OR 97124 USA Univ Tokyo Ctr Informat Technol Tokyo Japan Fujitsu Ltd Frontier Comp Ctr Tokyo Japan NVIDIA Corp Tokyo Japan

ISBN: (纸本)9781538643686

Many supercomputers are shifting to architectures with low B (byte/s;memory transfer capability) per F (FLOPS capability) ratios. However, utilizing increased F is difficult for applications that inherently require large B. Targeting an implicit unstructured low-order finite-element analysis solver, which typically requires large B, we have developed a concentrated computation algorithm that yields significant performance improvements on low B/F supercomputers. 35.7% peak performance was achieved for a sparse matrix-vector multiplication kernel, and 15.6% peak performance was achieved for the whole solver on the second generation Xeon Phi-based Oakforest-PACS. This is 5.02 times faster than (and 6.90 times the peak performance of) the state-of-the-art solver (the SC14 Gordon Bell finalist solver). On Oakforest-PACS, the proposed solver was approximately 2.42 times faster than the state-of-the-art solver running on the K computer. The proposed approach has implications for systems and applications and is expected to have significant impact on various fields that use finite-element methods for nonlinear time-evolution problems.

关键词： Fast Scalable Implicit Solver for Nonlinear time-evolution Problems Low-order Unstructured Finite Elements Concentrated Computation time-parallel

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