Field-programmable gate array (FPGA)-based real-time simulators are often applied in simulations of active distribution networks (ADNs) because of their parallel architectures and low cost. The overall performance of ...
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Field-programmable gate array (FPGA)-based real-time simulators are often applied in simulations of active distribution networks (ADNs) because of their parallel architectures and low cost. The overall performance of an FPGA-based real-time simulator is mainly determined by its kernel solver, which solves the nodal equation at each simulation time step. With the increasing scale of ADNs, real-time simulations of fast switching dynamics, along with limited computation hardware, have increased the requirements of the solver in terms of both time and resource consumption. In this study, a highly parallel kernel solver is proposed to improve the simulation efficiency of the FPGA-based real-time simulator. The multi-level parallel design and its implementation, including the parallelism at the system and module and element levels, are presented in detail. A modified IEEE 123-node system with distributed photovoltaics (PVs) is then simulated using a three-FPGA-based real-time simulator. Simulation results are compared with the commercial simulation tool PSCAD/EMTDC to validate the proposed kernel solver.
One of the main properties of today's distributed and parallelsystems, such as mobile ad-hoc networks and grids, is their heterogeneity in the available resources. Further, many applications of such systems are s...
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One of the main properties of today's distributed and parallelsystems, such as mobile ad-hoc networks and grids, is their heterogeneity in the available resources. Further, many applications of such systems are subject to time/Utility Function (TUF) time constraints for jobs, unavoidable variability in job characteristics and arrivals, and statistical assurance requirements on timeliness behaviors. In this paper, we propose an exact analytical solution for performance evaluation of dynamic policies used for routing of TUF-constrained Firm real-time (FRT) jobs among parallel single-processor queues with arbitrary processing rates and capacities. The analytical method can be used for the evaluation of the compliance of some important statistical assurance requirements. Furthermore, we present a utility-aware dynamic routing policy to improve the expected accrued utility of the parallel system. The policy called Maximum Expected Utility (MEU) behaves based on the information gathered from the analytical solution. MEU is compared with some well-known Dynamic Routing (DR) policies for different TUF shapes and both cases of homogeneous and heterogeneous processors of a two-queue system. The comparisons show the efficiency of MEU for the former case and its good behavior in most situations for the latter case.
A static analysis for reasoning about the temporal behaviors of programs in real-timedistributed programming languages is proposed. The analysis is based on the action set semantics using the pure maximal parallelism...
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A static analysis for reasoning about the temporal behaviors of programs in real-timedistributed programming languages is proposed. The analysis is based on the action set semantics using the pure maximal parallelism model. It is shown how to specify and verify various timing properties of real-time programs. The approach provides only an approximate timing behavior, because the state information is ignored. However, many interesting properties such as parallel actions, deadlocks, livelocks, terminations, temporal errors, and failures, can be identified. Furthermore, the approach is compositional and thus makes it possible to reason about the timing properties incrementally. The method not only leads to efficient algorithms for the static analysis of CSP programs but also applies to many other languages.
With the increased degree of miniaturization resulting from the use of modem VLSI technology and the high communication bandwidth available through optical connections, it is now possible to build massively parallel c...
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With the increased degree of miniaturization resulting from the use of modem VLSI technology and the high communication bandwidth available through optical connections, it is now possible to build massively parallel computers based on distributed modules which can be embedded in advanced industrial products. Examples of such future possibilities are ''action-oriented systems'', in which a network of highly parallel modules perform a multitude of tasks related to perception, cognition, and action. The paper discusses questions of architecture on the level of modules and inter-module communication and gives concrete architectural solutions which meet the demands of typical, advanced industrial real-time applications. The interface between the processors arrays and the all-optical communication network is described in some detail. Implementation issues specifically related to the demand for miniaturization are discussed.
High-speed, wide-area networks have made it both possible and desirable to interconnect geographically distributed lections of scientific data, remote scientific instruments, and high-performance computer systems. His...
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High-speed, wide-area networks have made it both possible and desirable to interconnect geographically distributed lections of scientific data, remote scientific instruments, and high-performance computer systems. Historically, performance analysis has focused on monolithic applications executing on large, stand-alone, parallelsystems. In such a domain, measurement, postmortem analysis, and code optimization suffice to eliminate performance bottlenecks and optimize applications. distributed visualization, data mining, and analysis tools allow scientists to collaboratively analyze and understand complex phenomena. Likewise, real-time performance measurement and immersive performance display systems-that is, systems providing large stereoscopic displays of complex data-enable collaborating groups to interact with executing software, tuning its behavior to meet research and performance goals. To satisfy these demands, the authors designed Virtue, a prototype system that integrates collaborative, immersive performance visualization with real-time performance measurement and adaptive control of applications on computational grids. These tools enable physically distributed users to explore and steer the behavior of complex software in realtime and to analyze and optimize distributed application dynamics.
The design, implementation, and evaluation of a distributedreal-time architecture called HARTS (hexagonal architecture for real-timesystems) are discussed, emphasizing its support of time-constrained, fault-tolerant...
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The design, implementation, and evaluation of a distributedreal-time architecture called HARTS (hexagonal architecture for real-timesystems) are discussed, emphasizing its support of time-constrained, fault-tolerant communications and I/O (input/output) requirements. HARTS consists of shared-memory multiprocessor nodes, interconnected by a wrapped hexagonal mesh. This architecture is intended to meet three main requirements of real-time computing: high performance, high reliability, and extensive I/O. The high-level and low-level architecture is described. The evaluation of HARTS, using modeling and simulation with actual parameters derived from its implementation, is reported. Fault-tolerant routing, clock synchronization and the I/O architecture are examined
This paper addresses issues related to transfer protocols of distributed RT-UNIX automation systems. The wide-scale application possibilities of ATM have been considered in order to generate ideas for an improved tran...
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This paper addresses issues related to transfer protocols of distributed RT-UNIX automation systems. The wide-scale application possibilities of ATM have been considered in order to generate ideas for an improved transfer protocol and to embed it into the operating system. A proposal to transform an existing RT-UNIX operating system (QNX 4.2) in order to provide ATM features is described and analyzed. For the analysis, prototyping models of the operating system, the net adapter, net driver and the net manager have been developed. Remote interprocess communication can be simulated and analyzed, to see whether the imposed timing constraints are fulfilled. Some case-studies of simulations have shown that the approach represents a powerful and expressive instrument for the remote interprocess communication in distributedreal-time automation systems.
Formation flying synthetic aperture radar (FF-SAR) systems, as an important development direction of multichannel SAR, can achieve high-resolution wide-swath imaging. Coherently combining data from satellite receivers...
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Formation flying synthetic aperture radar (FF-SAR) systems, as an important development direction of multichannel SAR, can achieve high-resolution wide-swath imaging. Coherently combining data from satellite receivers puts a strain on the traditional real-time processing systems based on individual satellites. Characteristics, such as the power of real-time on-orbit processing platform, must be properly balanced with constrained memory and parallel computational resources. This article proposes a distributed SAR real-time imaging method based on the embedded graphics processing units (GPUs). The parallel computing method of the chirp scaling algorithm is designed based on the parallel programming model of compute unified device architecture, and the optimization methods of memory and performance are proposed for the hardware architecture of embedded GPUs. In particular, the unified memory management method is used to avoid data copying and communication delays between the CPU and GPU. A hardware verification system for distributed SAR real-time imaging processing based on multiple embedded GPUs is constructed. The proposed algorithm takes 5.86 s to process single-precision floating-point complex imaging with a data size of 8192 x 8192 on a single Jetson Nano platform. The actual power consumption is less than 5 W, and the performance-to-power ratio is greater than 1.7%. The experimental results show that the real-time processing method based on the embedded GPUs proposed in this article has high performance and low-power consumption.
Replicated data consistency is a key issue in the design of distributedrealtime groupware applications, In this paper, we propose a new protocol to cope with this problem. The proposed algorithm guarantees an optima...
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Replicated data consistency is a key issue in the design of distributedrealtime groupware applications, In this paper, we propose a new protocol to cope with this problem. The proposed algorithm guarantees an optimal response time while ensuring data consistency at system quiescence. The originality of our proposition relies on the fact that neither locks nor clocks nor global information are required to establish data consistency. Instead, direct dependency relations between generated operations as well as operation transformation mechanism are used. The coupling of the above two mentioned mechanisms is shown to realize a good trade-off between the different requirements of groupware applications. Advantages of our approach are illustrated by comparing the algorithm to two well known optimistic concurrency control protocols for groupware applications: dOPT and ORESTE.
Traditional object-oriented real-timesystems are often limited an that they provide only one approach to real-time object support. Taking the increasing demand for flexible and extensible object support environments ...
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