On-line Dynamic Security Assessment (DSA) is a challenge computing problem. A key problem in DSA is the analysis of a large number of dynamic stability contingencies every 10-20 minutes using on-line data. In order to...
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On-line Dynamic Security Assessment (DSA) is a challenge computing problem. A key problem in DSA is the analysis of a large number of dynamic stability contingencies every 10-20 minutes using on-line data. In order to speed up the transient stability analysis, parallel processing has been applied and several results can be found in the literature. In this paper, we present a distributed approach for real-time transient stability analysis. distributed computing is economically attractive providing the processing power of supercomputing at a lower cost. Several distributed software environments like the parallel Virtual Machine (PVM) allow an effective use of heterogeneous clusters of workstations. Both functional and domain decomposition of the transient stability problem were tested under PVM on a homogeneous cluster of eight DEC ALPHA and on an IBM SP2 machine. Functional decomposition has been obtained by the Shifted-Picard algorithm, whereas domain decomposition has been obtained concurrently running different contingencies on different nodes of the cluster, using the Very Dishonest Newton algorithm. In order to assess the performance of these approaches, time domain simulations, adopting detailed modeling for synchronous machines, have been carried out on a realistic-sized network comprising 2583 buses and 511 generators.
Mapping, i.e., allocating resources to applications and finding I/O routes between resources, is a crucial step in meeting real-time/multi-media applications' end-to-end timing requirements. Given a set of real-ti...
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This article proposes a new method called the Compensated distributed-Parameter Line Decoupling (CDLD) method, and used for decoupling distribution networks among parallel processing cores in a real-time multi-core en...
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This article proposes a new method called the Compensated distributed-Parameter Line Decoupling (CDLD) method, and used for decoupling distribution networks among parallel processing cores in a real-time multi-core environment. Due to the short length of distribution grid lines, decoupling the distribution network for real-time processing is challenging and approaches such as Stublines and State Space Nodal (SSN) solvers have been proposed. Both approaches have limitations and the method proposed in this work addresses these limitations to implement improvements. Specifically, the CDLD method can be used as an enhanced Stubline decoupling, improving on its accuracy and transient response, or it can be combined with an SSN solver to improve its computational performance and remove bottleneck issues. The CDLD method was tested on three IEEE benchmark systems in a real-time environment, and significant improvement was realized in network response and computational performance compared to the prevailing methods. The combined SSN-CDLD method proved to be the most promising approach for network decoupling.
In this paper we present design and analysis of a scalable real-time Face Recognition (FR) module to perform 450 recognitions per second. We introduce an algorithm for FR, which is a combination of Weighted Modular Pr...
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In this paper we present design and analysis of a scalable real-time Face Recognition (FR) module to perform 450 recognitions per second. We introduce an algorithm for FR, which is a combination of Weighted Modular Principle Component Analysis and Radial Basis Function Neural Networks. This algorithm offers better recognition accuracy in various practical conditions than algorithms used in existing architectures for real-time FR. To meet real-time requirements, a Scalable parallel Pipelined Architecture (SPPA) is developed by realizing the above FR algorithm as independent parallel streams and sub-streams of computations. SPPA is capable of supporting large databases maintained in external (DDR) memory. By casting the computations in a stream into hardware, we present the design of a Scalable Unit for Region Evaluation (SURE) core. Using SURE cores as computer elements in a massively parallel CGRA, like REDFINE, we provide a FR system on REDEFINE called REFRESH. We report FPGA and ASIC synthesis results for SPPA and REFRESH. Through analysis using these results, we show that excellent scalability and added programmability in REFRESH makes it a flexible and favorable solution for real-time FR.
This paper extends our previous work on formalizing event orderings using partial order set and its application in space analysis in distributed simulation. We focus on the time an space trade-off in exploiting event ...
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ISBN:
(纸本)0769518532
This paper extends our previous work on formalizing event orderings using partial order set and its application in space analysis in distributed simulation. We focus on the time an space trade-off in exploiting event parallelism. Event parallelism is divided into inherent (problem) parallelism, event ordering parallelism and effective event parallelism. Firstly, we analyze the performance cost of varying event ordering parallelism on memory requirement in open and closed systems. Secondly, we study the effects of interconnection topology Of a physical system on exploitable event ordering parallelism. Measurements were obtained from a time-space analyzer that we have developed.
The accelerated digitalisation of society along with technological evolution have extended the geographical span of cyber-physical systems. Two main threats have made the reliable and real-time control of these system...
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The accelerated digitalisation of society along with technological evolution have extended the geographical span of cyber-physical systems. Two main threats have made the reliable and real-time control of these systems challenging: (i) uncertainty in the communication infrastructure induced by scale, and heterogeneity of the environment and devices;and (ii) targeted attacks maliciously worsening the impact of the above-mentioned communication uncertainties, disrupting the correctness of real-time applications. This article addresses those challenges by showing how to build distributed protocols that provide both real-time with practical performance, and scalability in the presence of network faults and attacks, in probabilistic synchronous environments. We provide a suite of real-time Byzantine protocols, which we prove correct, starting from a reliable broadcast protocol, called PISTIS, up to atomic broadcast and consensus. This suite simplifies the construction of powerful distributed and decentralized monitoring and control applications, including state-machine replication. Extensive empirical simulations showcase PISTIS's robustness, latency, and scalability. For example, PISTIS can withstand message loss (and delay) rates up to 50 percent in systems with 49 nodes and provides bounded delivery latencies in the order of a few milliseconds.
The Virtuoso programming system is a real-time programming framework that offers the same high level API across all target platforms from single processor to multiprocessor systems. A very fast nanokernel that manages...
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The Virtuoso programming system is a real-time programming framework that offers the same high level API across all target platforms from single processor to multiprocessor systems. A very fast nanokernel that manages a set of light context processes is at the heart of the system. These nanokernel processes combine the speed of an interrupt Service Routine with the flexibility of a task and reduce considerably the latency of the application.
This study proposes a method of designing quadratic optimal fuzzy parallel-distributed-compensation controllers for a class of time-varying Takagi-Sugeno fuzzy model-based time-delay control systems used to solve the ...
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This study proposes a method of designing quadratic optimal fuzzy parallel-distributed-compensation controllers for a class of time-varying Takagi-Sugeno fuzzy model-based time-delay control systems used to solve the finite-horizon optimal control problem. The proposed method fuses the orthogonal function approach and the improved hybrid Taguchi-genetic algorithm. The Taguchi-genetic algorithm only requires algebraic computation to perform the algorithm used to solve time-varying Takagi-Sugeno fuzzy model-based time-delay feedback dynamic equations. The fuzzy parallel-distributed-compensation controller design problem is simplified by using the Taguchi-genetic algorithm to transform the static parameter optimization problem into an algebraic equation. The static optimization problem can then be solved easily by using the improved hybrid Taguchi-genetic algorithm to find the quadratic optimal parallel-distributed-compensation controllers of the time-varying Takagi-Sugeno fuzzy model-based time-delay control systems. The applicability of the proposed integrative method is demonstrated in a real-world design problem.
This paper presents an investigation into the utilisation of digital signal processing and parallel processing techniques for the real-time simulation of a flexible manipulator system. A finite dimensional simulation ...
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This paper presents an investigation into the utilisation of digital signal processing and parallel processing techniques for the real-time simulation of a flexible manipulator system. A finite dimensional simulation of the system is developed using a finite difference approximation to the governing dynamic equation of the manipulator. The proposed algorithm allows dynamic modification of the boundary conditions and the inclusion of a distributed actuator and sensor term in the system dynamic equation. The algorithm developed is implemented on a number of uni-processor and multi-processor, homogeneous and heterogeneous parallel architectures. The partitioning and mapping of the algorithm on the homogeneous and heterogeneous architectures is also explored. A comparison of the results of these implementations is made and discussed to establish merits of design and real-time processing requirements in the control of flexible manipulator systems. (C) 1996 Academic Press Limited
Matched-field processing (MFP) localizes sources more accurately than plane-wave beamforming by employing full-wave acoustic propagation models for the cluttered ocean environment. The minimum variance distortionless ...
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Matched-field processing (MFP) localizes sources more accurately than plane-wave beamforming by employing full-wave acoustic propagation models for the cluttered ocean environment. The minimum variance distortionless response MFP (MVDR-MFP) algorithm incorporates the MVDR technique into the MFP algorithm to enhance beamforming performance. Such an adaptive MFP algorithm involves intensive computational and memory requirements due to its complex acoustic model and environmental adaptation. The real-time implementation of adaptive MFP algorithms for large surveillance areas presents a serious computational challenge where high-performance embedded computing and parallel processing may be required to meet real-time constraints. In this paper, three parallel algorithms based on domain decomposition techniques are presented for the MVDR-MFP algorithm on distributed array systems. The parallel performance factors in terms of execution times, communication times, parallel efficiencies, and memory capacities are examined on three potential distributedsystems including two types of digital signal processor arrays and a cluster of personal computers. The performance results demonstrate that these parallel algorithms provide a feasible solution for real-time, scalable, and cost-effective adaptive beamforming on embedded, distributed array systems.
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