The real-time scheduling advisor (RTSA) is an entirely user-level system that an application running on a typical shared, unreserved distributed computing environment can turn to for advice on how to schedule its comp...
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The real-time scheduling advisor (RTSA) is an entirely user-level system that an application running on a typical shared, unreserved distributed computing environment can turn to for advice on how to schedule its compute-bound soft real-time tasks. Given a list of hosts, a description of the CPU demands of the task, the deadline, and a confidence level, the RTSA will recommend one of the hosts and predict, as a confidence interval, the running time of the task on that host. The RTSA is based on a scalable and extensible shared resource prediction system based on statistical time series analysis. The author first describes how the RTSA builds on this underlying system to provide its service, and then he evaluates its performance using a randomized methodology based on real background workloads, determining the effect of different factors. He also compares it with a random approach and a measurement-based approach.
We describe a two-level scheduling scheme for mixed parallel and sequential workloads on scalable parallel machines. The design of this scheduling system is based on two principles, that is, parallel programs should b...
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We describe a two-level scheduling scheme for mixed parallel and sequential workloads on scalable parallel machines. The design of this scheduling system is based on two principles, that is, parallel programs should be scheduled in a coordinated manner so that they will not severely interfere with each other and the performance for parallel compacting becomes predictable, and parallel programs may time-share resources with sequential programs so that the efficiency of processor utilisation can greatly be enhanced and good response to interactive clients can be maintained. We also discuss the organisation of a registration office through which the two-level scheduling is realised.
The objective of the subject paper is to present the results of a multicriterion analysis of dynamic properties of a hierarchical distributed process control system structure.
ISBN:
(纸本)3540150331
The objective of the subject paper is to present the results of a multicriterion analysis of dynamic properties of a hierarchical distributed process control system structure.
The feature selection effect directly affects the classification accuracy of the text. This paper introduces a new text feature selection method based on bat optimization. This method uses the traditional feature sele...
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ISBN:
(纸本)9781728140698
The feature selection effect directly affects the classification accuracy of the text. This paper introduces a new text feature selection method based on bat optimization. This method uses the traditional feature selection method to pre-select the original features, and then uses the bat group algorithm to optimize the pre-selected features in binary code form, and uses the classification accuracy as the individual fitness. However, when the amount of text information is large, the execution time of the single machine is long. According to this shortcoming, combining the Bat Algorithm and the Spark parallel computing framework, the text feature selection algorithm SBATFS is proposed. The algorithm combines the good search performance of the bat algorithm with the distributed and efficient calculation speed to realize the efficient solution of the text feature selection optimization model. The results show that compared with the traditional feature selection method, after SBATFS is used for feature optimization, the classification accuracy is effectively improved.
Problem Solving Environments offer an integrating approach for constructing and running complex systems and components, such as distributed simulation and decision support systems. New distributed infrastructures like...
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ISBN:
(纸本)3540210482
Problem Solving Environments offer an integrating approach for constructing and running complex systems and components, such as distributed simulation and decision support systems. New distributed infrastructures like the Grid support the access to a large variety of core services and resources in a secure environment. In this paper we propose an approach to Grid access for interactive Problem Solving Environments built on top of the High Level Architecture (HLA), a mature distributed simulation framework. This approach is based on a set of Grid Services which allow the setup and interactive steering of complex Grid applications consisting of modules for simulation and visualization. We discuss a three-level approach to the problem. In the first step we focus on discovery of HLA Runtime Infrastructure (RTI) processes that coordinate distributed components of an interactive application. Next we investigate efficient Grid-based data transfer protocols as a promising alternative for current RTI communication. Finally, we will completely replace RTI by Grid technology mechanisms. As a proof-of-concept example, we use the CrossGrid biomedical simulation application, which requires near realtime steering of simulation parameters during runtime of the simulation running on the Grid.
Current supercomputers are evolving to clusters with a very large number of nodes, and what is more, the nodes are each time becoming more complex composed of several multicore chips and GPUs. With such architectures,...
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ISBN:
(纸本)9781450311809
Current supercomputers are evolving to clusters with a very large number of nodes, and what is more, the nodes are each time becoming more complex composed of several multicore chips and GPUs. With such architectures, the application developers are every time facing a more complex task. On the other hand, most HPC applications are scientific legacy codes written in MPI and designed for at most thousands of processors. Current efforts deal with extending these applications to scale to larger number of cores and to be combined with CUDA or OpenCL to efficienly run on GPUs. To evolve a given application to be suitable to run in new heterogeneous supercomputers, application developers can take different alternatives. Optimizations to improve the MPI bottlenecks, for example, by using asynchronous communications, or optimizations on the sequential code to improve its locality, or optimizations at the node level to avoid resource contention, to list a few. This paper proposes a methodology to enable current MPI applications to be improved using the MPI/StarSs programming model. StarSs [2] is a task-based programming model that enables to parallelize sequential applications by means of annotating the code with compiler directives. What is more important, it supports their execution in heterogeneous platforms, including clusters of GPUs. Also it nicely hybridizes with MPI [1], and enables the overlap of communication and computation. The approach is based on the generation at execution time of a directed acyclic graph (DAG), where the nodes of the graph denote tasks in the application and edges denote data dependences between tasks. Once a partial DAG has been generated, the StarSs runtime is able to schedule the tasks to the different cores or GPUs of the platform. Another relevant aspect is that the programming model offers to the application developers a single name space while the actual memory addresses can be distributed (as in a cluster or a node with GPUs). The Star
distributed program reliability has been proposed as a reliability index for distributed computing systems to analyze the probability of the successful execution of a program, task, or mission in the system. However, ...
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distributed program reliability has been proposed as a reliability index for distributed computing systems to analyze the probability of the successful execution of a program, task, or mission in the system. However, current reliability models proposed for distributed program reliability evaluation do not capture the effects of real-time constraints. We propose an approach to the reliability analysis of distributed programs that addresses real-time constraints. Our approach is based on a model for evaluating transmission time, which allow us to find the time needed to complete execution of the program, task, or mission under evaluation. With information on time-constraints, the corresponding Markov state space can then be defined for reliability computation. To speed up the evaluation process and reduce the size of the Markov state space, several dynamic reliability-preserving reductions are developed. A simple distributedreal-time system is used as an example to illustrate the feasibility and uniqueness of the proposed approach.< >
We consider an important tradeoff between processor and memory allocation in distributedparallel processing systems. To study this tradeoff, we formulate stochastic models of parallel program behavior, distributed pa...
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ISBN:
(纸本)089791659X
We consider an important tradeoff between processor and memory allocation in distributedparallel processing systems. To study this tradeoff, we formulate stochastic models of parallel program behavior, distributedparallel processing environments and memory overheads incurred by parallel programs as a function of their processor allocation. A mathematical analysis of the models is developed, which includes the effects of contention for shared resources caused by paging activity. We conduct a detailed analysis of real large-scale scientific applications and use these results to parameterize our models. Our results show that memory overhead resulting from processor allocation decisions can have a significant effect on system performance in distributedparallel environments, strongly suggesting that memory considerations must be incorporated in the resource allocation policies for parallelsystems. We also demonstrate the importance of the inter-locality miss ratio, which is introduced in this paper and analyzed for the first time.
The increasing demand for low power and high performance multimedia embedded systems has motivated the need for effective solutions to satisfy application bandwidth and latency requirements under a tight power budget....
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The increasing demand for low power and high performance multimedia embedded systems has motivated the need for effective solutions to satisfy application bandwidth and latency requirements under a tight power budget. As technology scales, it is imperative that applications are optimized to take full advantage of the underlying resources and meet both power and performance requirements. We propose a methodology capable of discovering and enabling parallelism opportunities via code transformations, efficiently distributing the computational load across resources, and minimizing unnecessary data transfers. Our approach decomposes the application's tasks into smaller units of computations called kernels, which are distributed and pipelined across the different processing resources. We exploit the ideas of inter-kernel data reuse to minimize unnecessary data transfers between kernels and early execution edges to drive performance. Our experimental results on a JPEG2000 case study show up to 80% performance improvement and 60% dynamic power reduction over standard application mapping approaches.
This paper presents an overview of the Scalable parallel Instrumentation (SPI) tool being developed at Honeywell. SPI provides a complete development and execution environment for developing real-time instrumentation ...
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This paper presents an overview of the Scalable parallel Instrumentation (SPI) tool being developed at Honeywell. SPI provides a complete development and execution environment for developing real-time instrumentation functions for heterogeneous parallel/distributedsystems. This includes: C-extensions and development tools for the event-action programming model, run-time support for transparent event-action execution on a heterogeneous distributed platform, and a library of primitives (actions) ranging from real-lime data collection, analysis to graphic display. Concurrent instrumentation functions can be flexibly parallelized/distributed over the heterogeneous platform to selectively analyze and display desired activity at the hardware, OS, IPC, and application levels. SPI is currently operational on a heterogeneous platform of SUN workstations and Intel Paragon.< >
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