A novel parameter extraction technique suitable f or short channel length lightly-doped-drain (LDD) MOSFET's is proposed which seg ments the total gate bias range,and executes the linear regression in every subs ...
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A novel parameter extraction technique suitable f or short channel length lightly-doped-drain (LDD) MOSFET's is proposed which seg ments the total gate bias range,and executes the linear regression in every subs ections,yielding the gate bias dependent parameters,such as effective channel le ngth,parasitic resistance,and mobility,*** method avoids the gate bias rang e optimization,and retains the accuracy and simplicity of linear *** extracted gate bias dependent parameters are implemented in the compact I-V model which has been proposed for deep submicron LDD MOSFET'*** good agreemen ts between simulations and measurements of the devices on 0.18μm CMOS technolo gy indicate the effectivity of this technique.
A compact model for LDD MOSFET is proposed,which involves the hyperbolic tangent function description and the physics of device with emphasis on the substrate current *** simulation results demonstrate good agreement...
详细信息
A compact model for LDD MOSFET is proposed,which involves the hyperbolic tangent function description and the physics of device with emphasis on the substrate current *** simulation results demonstrate good agreement with measurement,and show that deep submicron LDD MOSFET has larger substrate current than submicron device *** improved model costs low computation consumption,and is effective in manifestation of hot carrier effect and other effects in deep submicron devices,in turn is suitable for design and reliability analysis of scaling down devices.
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