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17th IEEE International Conference on Parallel and Distributed systems (ICPADS)

作者： Wang, Guibin Lin, Yisong National Laboratory for Parallel and Distributed Processing National University of Defense Technology China

ISBN: (纸本)9780769545769

Power management has become one of the first-order considerations in high performance computing field. Many recent studies focus on optimizing the performance of a computer system within a given power budget. However, most existing solutions adopt fixed period control mechanism and are transparent to the running applications. Although the application-transparent control mechanism has relatively good portability, it exhibits low efficiency in accelerator-based heterogeneous parallel systems. In typical accelerator-based parallel systems, different processing units have largely different processing speeds and power consumption. Under a given power constraint, how to choose the processor to be slowed down and how to schedule a parallel task onto different processors for the maximum performance are different from those in homogeneous systems and have not been well studied. From the motivating example in this paper, we could find that in order to efficiently harness the heterogeneous parallel processing, one should not only perform dynamic voltage/frequency scaling (DVFS) to meet the power budget, but also tune the parallel task scheduling to adapt to the changes. In this paper, we propose a heterogeneity-aware peak power management, which extends existing application-transparent power controller with an application-aware power controller. Firstly, we theoretically analyze the conditions for the maximum performance given a power budget for heterogeneous systems. based on this result, we provide a power-constrained parallel task partition algorithm, which coordinates parallel task partition and voltage scaling for heterogeneous processing units to achieve the optimal performance given a system power budget. Finally, we evaluate the proposed method on a typical CPU-GPU heterogeneous system, and validate the superiority of application-aware power controller over the existing method.

关键词： accelerator-based systems Peak Power Management GPU

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Reusable software components for accelerator-based clusters

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JOURNAL OF systems AND SOFTWARE 2011年第7期84卷 1071-1081页

作者： Rafique, M. Mustafa Butt, Ali R. Tilevich, Eli Virginia Tech Dept Comp Sci Blacksburg VA 24061 USA

The emerging accelerator-based heterogeneous clusters, comprising specialized processors such as the IBM Cell and GPUs, have exhibited excellent price to performance ratio as well as high energy-efficiency. However, developing and maintaining software for such systems is fraught with challenges. especially for modern high-performance computing (HPC) applications that can benefit the most from leveraging accelerators. If accelerator-based clusters are to deliver on their initial promise to provide a viable and cost-effective HPC solution to researchers and practitioners, one must find a software solution to lower the barrier to entry for the average user. In this paper, we investigate how a software component based approach can be used to provide a reusable and adaptable architecture for executing HPC tasks on accelerator-based clusters. In our implementation, we leverage the lessons from the software engineering research for component-based layered architectures. Our results indicate that the complexity of developing and maintaining accelerator-based cluster software can be as effectively tamed by solid software engineering approaches as that of software in more traditional domains. Specifically, we were able to reuse 83.6% of our implementation code across different architectures and resource configurations. while achieving the overall execution performance only 1.5% off that of an optimally hand-tuned, albeit non-reusable version. (C) 2011 Elsevier Inc. All rights reserved.

关键词： accelerator-based systems Heterogeneous clusters Reusable software components Mixin-layers High-performance computing

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A Programmable Parallel accelerator for Learning and Classification 10

A Programmable Parallel Accelerator for Learning and Classif...

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19th International Conference on Parallel Architectures and Compilation Techniques

作者： Cadambi, Srihari Majumdar, Abhinandan Becchi, Michela Chakradhar, Srimat Graf, Hans Peter NEC Labs Amer Inc Princeton NJ 08540 USA

ISBN: (纸本)9781450301787

For learning and classification workloads that operate on large amounts of unstructured data with stringent performance constraints, general purpose processor performance scales poorly with data size. In this paper, we present a programmable accelerator for this workload domain. To architect the accelerator, we profile five representative workloads, and find that their computationally intensive portions can be formulated as matrix or vector operations generating large amounts of intermediate data, which are then reduced by a secondary operation such as array ranking, finding max/min and aggregation. The proposed accelerator, called MAPLE, has hundreds of simple processing elements (PEs) laid out in a two-dimensional grid, with two key features. First, it uses in-memory processing where on-chip memory blocks perform the secondary reduction operations. By doing so, the intermediate data are dynamically processed and never stored or sent off-chip. Second, MAPLE uses banked off-chip memory, and organizes its PEs into independent groups each with its own off-chip memory bank. These two features together allow MAPLE to scale its performance with data size. This paper describes the MAPLE architecture, explores its design space with a simulator, and illustrates how to automatically map application kernels to the hardware. We also implement a 512-PE FPGA prototype of MAPLE and find that it is 1.5-10x faster than a 2.5 GHz quadcore Xeon processor despite running at a modest 125 MHz.

关键词： accelerator-based systems parallel computing heterogeneous computing machine learning

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A capabilities-aware programming model for asymmetric high-end systems 10

A capabilities-aware programming model for asymmetric high-e...

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10th IEEE/ACM International Symposium on Cluster, Cloud, and Grid Computing, CCGrid 2010

作者： Rafique, M. Mustafa Dept. of Computer Science Virginia Tech Blacksburg VA United States

ISBN: (纸本)9781424469871

In this research, we investigate and address the challenges of asymmetry in High-End Computing (HEC) systems comprising heterogeneous architectures with varying I/O and computation capacities. We focus on developing a flexible, scalable and easy-to-use programming model that automatically adapts to the capabilities of the system resources on largescale asymmetric clusters. Furthermore, we aim to develop innovative and efficient workload distribution techniques that bridge the asymmetry between system components. In particular, we intent to design tools and technologies that enable quick and efficient utilization of high-end asymmetric clusters in large-scale settings for modern scientific and enterprise computing. © 2010 IEEE.

关键词： accelerator-based systems

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