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ADVANCED DIGITAL RECEIVER PRINCIPLES AND TECHNOLOGIES FOR PCS

IEEE COMMUNICATIONS MAGAZINE 1995年第1期33卷 68-78页

作者： MEYR, H SUBRAMANIAN, R AT&T BELL LABS HOLMDEL NJ 07733 USA

The synergy between digital radio communications and VLSI signal processing is revolutionizing the design of wireless terminals. Driving this synergy are certain fundamental paradigms in modern communication theory, digital signal processing, and VLSI design. The authors discuss the modern centers-of-gravity model, which they believe is emerging as the basis for the successful design and implementation of advanced digital communication systems. Central to this model are design principles that enable engineers to systematically derive digital receiver structures and explore algorithm and architecture trade-offs using sophisticated tools. Digital signal processing technology is critical in the implementation of these digital receiver structures efficiently. Finally, CAD tools for digital communications system design and design space exploration are shown to be of crucial importance in the efficient execution of these designs.< >

关键词： Personal communication networks Digital communication Digital signal processing Very large scale integration Signal design Receivers Process design algorithm design and analysis design engineering Systems engineering and theory

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A new triple-layer OTC channel router

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IEEE TRANSACTIONS ON COMPUTER-AIDED design OF INTEGRATED CIRCUITS AND SYSTEMS 1996年第9期15卷 1059-1070页

作者： Kim, JW Kang, SM UNIV ILLINOIS DEPT ELECT ENGNURBANAIL 61801

We propose a new algorithm for a triple-layer over-the-cell (OTC) routing in an irregular cell area, While other OTC routers assume that the cell structure is restricted to a certain type such as uniform height, our OTC router accepts both standard cells and custom cells. Our OTC channel routing consists of five steps: i) double-layer routing, ii) track-to-metal3 transformation, iii) segment-to-metal3 transformation, iv) segment-to-metal1 transformation, and v) triple-layer routing, We prove that the transformation steps can be executed in linear time. The effectiveness of our algorithm is demonstrated through physical circuit layouts with fully customized cells, Our algorithm is applied to route MCNC benchmark circuits and Deutsch's difficult problem resulting in a significant reduction in channel area.

关键词： Routing Circuits Nonhomogeneous media Rails Large scale integration Logic Synthesizers algorithm design and analysis

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THE DETECTION OF LOW-AMPLITUDE YAWING MOTION TRANSIENTS IN A FLIGHT SIMULATOR

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IEEE TRANSACTIONS ON SYSTEMS MAN AND CYBERNETICS 1992年第2期22卷 300-306页

作者： SAMJI, AA REID, LD Institute for Aerospace Studies University of Toronto Downsview ONT Canada

A perennial problem facing flight simulator designers is how to handle motion system transients generated by washout algorithms intended to restrict the travel of the motion-base hardware. Motion cues in the flight simulator provide opportunities for lead compensation on the part of the pilot and thus one must ensure that onset transients are detected by the pilot. Likewise one must ensure that other unwanted motion transients generated by the system are not detected. The present study employs typical washout motion transients in an experiment designed to establish the motion levels required to achieve the aforementioned design goals. A set of critical amplitudes for both onset and return motion are determined in a flight simulator environment. It is found that a significant increase in detection levels occurs when the pilot switches from being a pure observer to actively controlling the simulator.

关键词： Motion detection Aerospace simulation Filters Hardware Aircraft Humans Angular velocity Predictive models algorithm design and analysis Switches

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A 32 KBIT/S ADPCM algorithm HAVING HIGH-PERFORMANCE FOR BOTH VOICE AND 9.6 KBIT/S MODEM SIGNALS

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IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS 1988年第2期6卷 262-273页

作者： HOSODA, K NOGUCHI, O YATSUZUKA, Y KOKUSAI DENSHIN DENWA CO LTD RES & DEV LABSMEGURO KUTOKYO 153JAPAN OKI ELECT IND CO LTD DIGITAL COMMUN LABSMINATO KUTOKYO 108JAPAN

A description is given of an advanced 32-kb/s ADPCM (adaptive digital pulse code modulation) algorithm and its implementation in a single-chip custom LSI using 2- mu m CMOS technology. The performance of the proposed codec, in terms of voice and modems operating at 1200-9600 b/s, is also discussed. The results indicate that the codec provides speech quality equivalent to that of the CCITT G.721 ADPCM and is capable of transmitting V.23 1200 b/s and V.27 and V.29 4800 b/s signals over at least four asynchronous tandem links. It can also transmit V.29 modem signals at 7200 b/s over at least four and at 9600 b/s over two asynchronous tandem links, and V.32 signals at 9600 b/s over four asynchronous tandem links.< >

关键词： Modems Programmable control Adaptive control Large scale integration Codecs Phase change materials Telecommunication traffic CMOS technology algorithm design and analysis Decoding

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A HIERARCHICAL algorithm FOR ONE-DIMENSIONAL GATE ASSIGNMENT BASED ON CONTRACTION OF NETS

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IEEE TRANSACTIONS ON COMPUTER-AIDED design OF INTEGRATED CIRCUITS AND SYSTEMS 1989年第6期8卷 622-629页

作者： YAMADA, S OKUDE, H KASAI, T Department of Electrical Engineering University of Osaka Prefecture Sakai Osaka Japan Matsushita Eletric Industrial Company Limited Japan Department of Electrical Engineering University of Osaka Prefecture Japan Department of Electrical Engineering University of Osaka Prefecture Osaka Japan

A one-dimensional gate assignment algorithm based on hierarchical contraction of nets is proposed. In this algorithm, a special feature of multiterminal nets plays an important role, namely that if the gates can be arranged such that the nets with fewer terminals are shorter, the chip area will be much reduced. The algorithm consists of two phases, hierarchical contraction of nets and partial gate assignment. In the first phase, the original problem is partitioned to multiple levels with the basis on contraction of multiterminal nets, and in the next phase, the gates at each level are placed close to one another. Experimental results on logic circuits are shown which are superior to those obtained by the method presented by T. Fujii, et al. (ibid., ***-6, no.3, p.159-64, March 1987).< >

关键词： Heuristic algorithms Partitioning algorithms Logic circuits Very large scale integration NP-hard problem Large-scale systems Terminology algorithm design and analysis

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Simulation of dispersive multiconductor transmission lines by Pade approximation via the Lanczos process

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IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES 1996年第12期44卷 2525-2535页

作者： Celik, M Cangellaris, AC Center for Electronic Packaging Research Department of Electrical and Computer Engineering University of Arizona Tucson Tucson AZ USA

A mathematical model for dispersive, multiconductor transmission lines is introduced that makes possible the utilization of the Pade approximation via the Lanczos (PVL) process to the analysis of linear networks that contain transmission line systems. The mathematical model is based on the use of Chebyshev polynomials for the representation of the spatial variation of the transmission-line voltages and currents, A simple collocation procedure is used to obtain a matrix representation of the transmission line equations with matrix coefficients that are first order polynomials in the Laplace-transform variable a and in which terminal transmission-line voltages and currents appear explicitly. Thus, the model is compatible with both the PVL algorithm and the modified nodal analysis formalism. Results from the numerical simulation of both digital interconnect-type and microwave circuits are presented to demonstrate the validity and discuss the efficiency of the proposed model.

关键词： Dispersion Multiconductor transmission lines Transmission line matrix methods Mathematical model Chebyshev approximation Polynomials Transmission lines Voltage Laplace equations algorithm design and analysis

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AN INNOVATIVE TECHNIQUE FOR BACKBONE NETWORK design

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IEEE TRANSACTIONS ON SYSTEMS MAN AND CYBERNETICS 1989年第5期19卷 1122-1132页

作者： CHATTOPADHYAY, NG MORGAN, TW RAGHURAM, A AT&T BELL LABS HOLMDELNJ 07733

An algorithm is proposed for solving the minimum-cost backbone network design problem. The method includes time delay as the performance criterion and multiple-hop communication paths. The algorithm combines a branch-and bound method with the algorithm of L.R. Ford and D.R. Fulkerson (1962). The branch-and-bound method is used to find the network topology. A depth-first search using a cost heuristic that is a linear function of the maximum and current depth in the tree is used. When a feasible topology is found, the Ford-Fulkerson algorithm is applied to find the optimal paths. The resulting network is retained if it is the current optimum cost network. The algorithm is compared with a branch-and-bound algorithm and is found to produce globally optimal solutions. For large, sparsely connected networks computation times are reduced by a factor of over one thousand.< >

关键词： Spine algorithm design and analysis Computer networks Routing Cost function Network topology Process design Pricing Delay effects Communication networks

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Optimization of Image Encryption algorithm Based on Henon Mapping and Arnold Transformation of Chaotic Systems

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IEEE ACCESS 2024年 12卷 116905-116916页

作者： Wu, Yuebo Chu, Shiwei Bao, Huifang Wang, Duansong Zhou, Jian West Anhui Univ Sch Elect & Photoelect Engn Laan 237012 Peoples R China Anhui Univ Sch Elect Informat Engn Hefei 230039 Peoples R China

This study introduces an optimized image encryption algorithm that integrates Henon mapping and Arnold transformation to enhance the security and randomness of digital image encryption. The algorithm is designed to address the vulnerabilities of open network environments where data theft or corruption can compromise image quality during encryption. Initially, images are processed through grayscale conversion to reduce dimensionality, followed by Henon mapping to induce a chaotic sequence that scrambles the pixel matrix. Subsequently, Arnold transformation is applied, iterating 100 times to further disrupt the image structure, ensuring a high level of diffusion and complexity. The proposed method demonstrates superior performance with an average pixel change rate (NPCR) of 0.9982 and a normalized average change intensity (NACI) of 0.3654, significantly increasing resistance to differential attacks. The encrypted images exhibit higher information entropy and effectively mask the original data, although at the cost of extended encryption time due to the dual scrambling process. The study concludes that the combined use of Henon mapping and Arnold transformation not only strengthens encryption against various attacks but also introduces a novel approach to image encryption, with potential for further optimization to enhance efficiency in handling larger images. This advancement is crucial for protecting privacy and ensuring data integrity in the transmission and storage of images, particularly in the face of evolving cyber threats.

关键词： Cryptography Image processing Encryption algorithm design and analysis Chaos Image encryption algorithm combination Henon mapping Arnold transformation chaotic system

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Multitarget tracking with adaptive detection thresholds

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IEEE TRANSACTIONS ON AEROSPACE AND ELECTRONIC SYSTEMS 1996年第1期32卷 401-406页

作者： Chang, KC George Mason University USA

The idea of adjusting the detection thresholds adaptively to enhance the performance of an overall tracking system has been one of the important areas studied in tracking community for the last ten years. However, most of the previous work was developed for single target environments where a simple algorithm such as nearest neighbor (NN) or Probabilistic Data Association (PDA) filter was assumed to be used in the tracking system We study the issues of adaptive detection thresholds based on the assumption that an optimal assignment algorithm is adopted for a multitarget and cluttered environment. This research Is motivated by an important earlier work which makes the analytical evaluation of the optimal assignment algorithm possible. The performance measures considered for determining detection thresholds are the correct association probability and the expected estimation error. The analytical results obtained here represent the upper bound of the tracking performance and can be used for designing and evaluating a tracking system.

关键词： Target tracking Signal processing algorithms Neural networks Filters Nearest neighbor searches Estimation error Signal processing algorithm design and analysis Error analysis Upper bound

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SERIAL INTERFACING FOR EMBEDDED-MEMORY TESTING

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IEEE design & TEST OF COMPUTERS 1990年第2期7卷 52-63页

作者： NADEAUDOSTIE, B SILBURT, A AGARWAL, VK MCGILL UNIV MONTREAL H3A 2T5QUEBECCANADA

A serial interfacing scheme in which several embedded memories share the built-in, self-test circuit is presented. For external testing, this approach requires only two serial pins for access to the data path. There is considerable savings in routing area, and fewer external pins are needed to test random-access memories with wide words, such as those in application-specific integrated circuits for telecommunications. Even though the method uses serial access to the memory, a test pattern is applied every clock cycle because the memory itself shifts the test data. The method has been adapted to four common algorithms. In implementations of built-in self-test circuitry on several product chips, the area overhead was found to be acceptable.

关键词： Circuit testing Built-in self-test Random access memory Read-write memory Pins Hardware System testing Automatic testing Clocks algorithm design and analysis

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