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Distributed mixed-signal architecture for programmable smart image sensors

ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING 2018年第3期97卷 493-501页

作者： Le Hir, Juliette Kolar, Anthony Dos Santos, Filipe Vinci Sorbonne Univ GeePs Grp Elect Engn Paris CNRSCent SupelecUniv Paris SudUniv Paris Sacla 3&11 Rue Joliot Curie Gif Sur Yvette France Cent Supelec SANA Adv Analog Design Grp 3 Rue Joliot Curie Gif Sur Yvette France

Smart vision systems on a chip are promising for embedded applications. Currently, flexibility in the choice of integrated pre-processing tools is obtained at the expense of total silicon area and fill factor, which are otherwise optimized provided that the sensor performs a specific task. We propose a new architecture based on macropixel-level processing to improve the trade-off by using the same processing elements (PEs) for a whole group of pixels. In this paper, we show through transistor-level simulations the feasibility of using macropixel PEs. Their operative part is analog to avoid the bottleneck of analog to digital converters and has digital control which is distributed in and out of the matrix of pixels. PEs are designed to be suitable for coefficient-reconfigurable spatial and temporal filtering. Sharing electronics among several pixels and matching existing algorithms to the target architecture allow for such programmability without degrading too much pixel area nor fill factor.

关键词： Smart image sensor Vision system on a chip (VSoC) Focal-plane array algorithm-architecture matching Mixed analog-digital electronics

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An Accuracy-Area Tradeoff for Mixed-Signal Computation in Programmable Smart Image Sensors 16

An Accuracy-Area Tradeoff for Mixed-Signal Computation in Pr...

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16th IEEE International New Circuits and Systems Conference (NEWCAS)

作者： Le Hir, Juliette Vinci dos Santos, Filipe Kolar, Anthony UPMC Univ Paris 06 Sorbonne Univ Univ Paris Saclay Univ Paris SudCent SupelecGeePsUMR CNRS 8507 Gif Sur Yvette France Cent Supelec SANA Adv Analog Design Grp Gif Sur Yvette France

ISBN: (纸本)9781538648599

Tightly embedded systems often require low power real time processing of acquired sensor data. This paper presents the design and transistor-level implementation of a mixed-signal processing element for highly area-constrained systems in applications where approximate computing is sufficient. The analog processing unit consists of a switched capacitor circuit whose imperfections such as finite gain or offset errors are evaluated here through theoretical analyses and Monte Carlo simulations for a CMOS 0.35 mu m technology. Transistor-level simulation results further demonstrate that this processing unit is suitable for image pre-processing tasks such as spatial convolution for edge detection.

关键词： lived analog-digital electronics approximate computing algorithm-architecture matching smart image sensor vision system on a chip (VSoC)

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