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检索条件"主题词=Algorithms Implemented in Hardware"
29 条 记 录,以下是1-10 订阅
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Leveraging Modern C plus plus in High-Level Synthesis
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IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 2023年 第4期42卷 1123-1132页
作者: Lahti, Sakari Rintala, Matti Hamalainen, Timo D. Tampere Univ Unit Comp Sci Tampere 33720 Finland
High-level synthesis (HLS) enables the automated conversion of high-level language algorithms into synthesizable register-transfer level code, allowing computation-intensive algorithms to be accelerated on FPGAs. Most... 详细信息
来源: 评论
Dynamic Sparse Attention for Scalable Transformer Acceleration
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IEEE TRANSACTIONS ON COMPUTERS 2022年 第12期71卷 3165-3178页
作者: Liu, Liu Qu, Zheng Chen, Zhaodong Tu, Fengbin Ding, Yufei Xie, Yuan Univ Calif Santa Barbara Santa Barbara CA 93106 USA
Transformers are the mainstream of NLP applications and are becoming increasingly popular in other domains such as Computer Vision. Despite the improvements in model quality, the enormous computation costs make Transf... 详细信息
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Pruning Binarized Neural Networks Enables Low-Latency, Low-Power FPGA-Based Handwritten Digit Classification
Pruning Binarized Neural Networks Enables Low-Latency, Low-P...
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IEEE High Performance Extreme Computing Virtual Conference (HPEC)
作者: Payra, Syamantak Loke, Gabriel Fink, Yoel Steinmeyer, Joseph D. Stanford Univ Dept Elect Engn Stanford CA 94305 USA MIT Dept Mat Sci & Engn Cambridge MA USA MIT Dept Mat Sci & Engn Dept Elect Engn & Comp Sci Cambridge MA USA MIT Inst Soldier Nanotechnol Cambridge MA USA MIT Dept Elect Engn & Comp Sci Cambridge MA USA
As neural networks are increasingly deployed on mobile and distributed computing platforms, there is a need to lower latency and increase computational speed while decreasing power and memory usage. Rather than using ... 详细信息
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FPGA-based Learning Acceleration for LSTM Neural Network
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PARALLEL PROCESSING LETTERS 2023年 第1N02期33卷 2350001-2350001页
作者: Dec, Grzegorz Rafal Rzeszow Univ Technol Dept Comp & Control Engn W Pola 2 PL-35959 Rzeszow Poland
This paper presents and discusses the implementation of a learning accelerator for an LSTM neural network that utilizes an FPGA. The accelerator consists of a backpropagation through time algorithm for an LSTM. The pr... 详细信息
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Majority-Logic, its applications, and atomic-scale embodiments
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COMPUTERS & ELECTRICAL ENGINEERING 2020年 83卷 106562-106562页
作者: Parhami, Behrooz Abedi, Dariush Jaberipur, Ghassem Univ Calif Santa Barbara Dept Elect & Comp Engn Santa Barbara CA 93106 USA Shahid Beheshti Univ Dept Comp Sceince & Engn Tehran *** Iran Inst Res Fundamental Sci IPM Sch Comp Sci Tehran Iran
Today's computing is increasingly data-intensive, heralding the age of big data. With greater data volumes, come the needs for faster processing, greater storage capacity, and expanded communication bandwidth, all... 详细信息
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FPGA-based Neural Net for Failures Prediction in the Cold Forging Process
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PARALLEL PROCESSING LETTERS 2022年 第1N02期32卷 2150023-2150023页
作者: Dec, Grzegorz Rafal Rzeszow Univ Technol Dept Comp & Control Engn W Pola 2 PL-35959 Rzeszow Poland
This paper presents and discusses the implementation of deep neural network for the purpose of failure prediction in the cold forging process. The implementation consists of an LSTM and a dense layer implemented on FP... 详细信息
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LSTM Cell Implementation on FPGAs
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PARALLEL PROCESSING LETTERS 2021年 第2期31卷
作者: Dec, Grzegorz Rafal Rzeszow Univ Technol Dept Comp & Control Engn W Pola 2 PL-35959 Rzeszow Poland
This paper presents and discusses the implementation of an LSTM cell on an FPGA with an activation function inspired by the CORDIC algorithm. The realization is performed using both IEEE754 standard and 32-bit integer... 详细信息
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Adapting Computer Arithmetic Structures to Sustainable Supercomputing in Low-Power, Majority-Logic Nanotechnologies
IEEE TRANSACTIONS ON SUSTAINABLE COMPUTING
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IEEE TRANSACTIONS ON SUSTAINABLE COMPUTING 2018年 第4期3卷 262-273页
作者: Jaberipur, Ghassem Parhami, Behrooz Abedi, Dariush Shahid Beheshti Univ Dept Comp Sci & Engn Tehran *** Iran Inst Res Fundamental Sci IPM Sch Comp Sci Tehran Iran Univ Calif Santa Barbara Dept Elect & Comp Engn Santa Barbara CA 93106 USA
Petascale supercomputers are already pushing power boundaries that can be supplied or dissipated cost-effectively;greater challenges await us in the era of exascale machines. We are thus motivated to study methods of ... 详细信息
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A Fully-Pipelined hardware Design for Gaussian Mixture Models
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IEEE TRANSACTIONS ON COMPUTERS 2017年 第11期66卷 1837-1850页
作者: He, Conghui Fu, Haohuan Guo, Ce Luk, Wayne Yang, Guangwen Tsinghua Univ Dept Comp Sci & Technol Beijing 100044 Shi Peoples R China Tsinghua Univ Minist Educ Key Lab Earth Syst Modeling Beijing 100044 Shi Peoples R China Tsinghua Univ Dept Earth Syst Sci Beijing 100044 Shi Peoples R China Tsinghua Univ Inst High Performance Comp Beijing 100044 Shi Peoples R China Imperial Coll London SW7 2AZ England
Gaussian Mixture Models (GMMs) are widely used in many applications such as data mining, signal processing and computer vision, for probability density modeling and soft clustering. However, the parameters of a GMM ne... 详细信息
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An Ultra-Low Power, "Always-On" Camera Front-End for Posture Detection in Body Worn Cameras Using Restricted Boltzman Machines
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IEEE TRANSACTIONS ON MULTI-SCALE COMPUTING SYSTEMS 2015年 第4期1卷 187-194页
作者: Desai, Soham Jayesh Shoaib, Mohammed Raychowdhury, Arijit Georgia Inst Technol Sch Elect & Comp Engn Atlanta GA 30332 USA Microsoft Corp Microsoft Res Redmond WA 98052 USA
The Internet of Things (loTs) has triggered rapid advances in sensors, surveillance devices, wearables and body area networks with advanced Human-Computer Interfaces (HCI). One such application area is the adoption of... 详细信息
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