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检索条件"主题词=Application Program Interfaces"

共 307 条记录，以下是121-130 订阅

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Teaching Advanced Software Design in Team-Based Project Course

Teaching Advanced Software Design in Team-Based Project Cour...

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IEEE 26th Conference on Software Engineering Education and Training (CSEE and T)

作者： Jarzabek, Stan Natl Univ Singapore Dept Comp Sci Singapore 117548 Singapore

ISBN: (纸本)9781467351409

Skillful design remains one of the critical success factors in long-lived software projects. Design fundamentals have been established and are pretty stable. How do we teach design in-the-large to equip our graduates with design skills relevant to a plethora of changing software technologies and emerging new application domains? Today programs are built on top of functionalities provided by software platforms. Most often, developers extend existing systems rather than develop from scratch. programming with application program interfaces (API) that allow newly written code to call middleware or existing application software has become a norm in software industries. While the details of API mechanisms heavily depend on a specific platform or application, the principles behind API design are universal, and can be taught in project courses designed for that purpose. Working knowledge of API design principles helps students faster adapt to new and changing technologies. In the paper, we describe a teaching methodology and 10 years of experiences teaching advanced design in a team-based software engineering project course. Our course builds around fundamental concepts in API design and use.

关键词： application program interfaces computer science education educational courses software engineering teaching

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Building Development Tools Interactively using the EKEKO Meta-programming Library

Building Development Tools Interactively using the EKEKO Met...

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Software Evolution Week / IEEE Conference on Software Maintenance, Reengineering, and Reverse Engineering (CSMR-WCRE)

作者： De Roover, Coen Stevens, Reinout Vrije Univ Brussel Software Languages Lab Brussels Belgium

ISBN: (纸本)9781479937523

EKEKO is a Clojure library for applicative logic meta-programming against an Eclipse workspace. EKEKO has been applied successfully to answering program queries (e.g., "does this bug pattern occur in my code?"), to analyzing project corpora (e.g., "how often does this API usage pattern occur in this corpus?"), and to transforming programs (e.g., "change occurrences of this pattern as follows") in a declarative manner. These applications rely on a seamless embedding of logic queries in applicative expressions. While the former identify source code of interest, the latter associate error markers with, compute statistics about, or rewrite the identified source code snippets. In this paper, we detail the logic and applicative aspects of the EKEKO library. We also highlight key choices in their implementation. In particular, we demonstrate how a causal connection with the Eclipse infrastructure enables building development tools interactively on the Clojure read-eval-print loop.

关键词： application program interfaces logic programming program control structures program debugging query processing software libraries source code (software) API usage pattern Clojure library Clojure read-eval-print loop EKEKO metaprogramming library Eclipse infrastructure Eclipse workspace applicative logic metaprogramming building development tools error markers logic queries program query answering program transformation project corpora analysis source code snippet identification Buildings Computational modeling Java Libraries Logic programming Vectors Visualization

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ON-THE-FLY HEALING OF RACE CONDITIONS IN ARINC-653 FLIGHT SOFTWARE

ON-THE-FLY HEALING OF RACE CONDITIONS IN ARINC-653 FLIGHT SO...

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29th Digital Avionics Systems Conference on Improving Our Environment through Green Avionics and ATM Solutions

作者： Ha, Ok-Kyoon Tchamgoue, Guy Martin Suh, Jeong-Bae Jun, Yong-Kee Gyeongsang Natl Univ Dept Informat Jinju South Korea Aero Master Corp Sacheon South Korea

ISBN: (纸本)9781424466177

The ARINC-653 standard architecture for flight software specifies an application executive (APEX) which provides an application programming interface and defines a hierarchical framework which provides health management for error detection and recovery. In every partition of the architecture, however, asynchronously concurrent processes or threads may include concurrency bugs such as unintended race conditions which are common and difficult to remove by testing. A race condition toward a shared data, or data race, is a pair of unsynchronized instructions that access a shared variable with at least one write access. Data races threaten the reliability of shared-memory programs seriously and latently, because they result in unintended nondeterministic executions of the programs. To heal data race during executions of ARINC-653 flight software, this paper instruments on-the-fly race detection into the target program and incorporates on-the-fly race healing into the health management of the ARINC-653 architecture. The race detection signals to the health monitor using the corresponding APEX call, if a data race is detected. The health monitor then responds by invoking an aperiodic, user-defined, error handling process that is assigned the highest possible priority. This special process uses an APEX call to identify and then heals the occurrence of race condition as an application error, one of seven error types defined by ARINC-653. This race-healing process allows the target programs to be assured at run-time that the execution result of the healed program could have been in the original program and therefore no new functional bug has been introduced. This paper evaluates efficiencies of the on-the-fly mechanisms to argue that they are practical to be configured under the ARINC-653 partitions.

关键词： APEX ARÎNC-653 standard architecture ARINC-653 flight software aerospace computing application executive application program interfaces application programming interface asynchronously concurrent process avionics concurrency bug concurrency control data race error detection error detection error recovery health management nondeterministic execution program debugging shared memory systems shared-memory program reliability software reliability system recovery unsynchronized instruction write access

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Inferring Likely Mappings between APIs

Inferring Likely Mappings between APIs

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35th International Conference on Software Engineering (ICSE)

作者： Gokhale, Amruta Ganapathy, Vinod Padmanaban, Yogesh Rutgers State Univ Dept Comp Sci Piscataway NJ 08854 USA

ISBN: (纸本)9781467330763

Software developers often need to port applications written for a source platform to a target platform. In doing so, a key task is to replace an application's use of methods from the source platform API with corresponding methods from the target platform API. However, this task is challenging because developers must manually identify mappings between methods in the source and target APIs, e.g., using API documentation. We develop a novel approach to the problem of inferring mappings between the APIs of a source and target platform. Our approach is tailored to the case where the source and target platform each have independently-developed applications that implement similar functionality. We observe that in building these applications, developers exercised knowledge of the corresponding APIs. We develop a technique to systematically harvest this knowledge and infer likely mappings between the APIs of the source and target platform. The output of our approach is a ranked list of target API methods or method sequences that likely map to each source API method or method sequence. We have implemented this approach in a prototype tool called Rosetta, and have applied it to infer likely mappings between the Java2 Platform Mobile Edition and Android graphics APIs.

关键词： Java application program interfaces software tools

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Ontology Modeling for REST Open APIs and Web Service Mash-up Method

Ontology Modeling for REST Open APIs and Web Service Mash-up...

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27th International Conference on Information Networking (ICOIN)

作者： Jung, Wan Kim, Sang Il Kim, Hwa Sung KwangWoon Univ Seoul South Korea

ISBN: (纸本)9781467357425

According as the web technology rapidly advances, web services are taking a step further up to the era of Web 2.0 which goes beyond the existing closed web services and enables ones to open and share information freely. Web services are usually provided in the form of Open APIs (application programming Interface). As the number of open APIs is increasing and its variety of the web services have wide spectrum, mash-up web services that combine several open APIs are fairly proliferated on Web 2.0 environment and even the service users are also interested in producing their own mash-up web services. When generating mash-up web services, however, the users have difficulties in that they should find Open APIs they need by looking up the web service information by their own and also they are forced to determine whether it is necessary. Also, when looking up the web service information, numerous unnecessary Open APIs are retrieved along with the desired Open API, which makes it difficult for users to find desired Open APIs readily and swiftly, because the current Open API search is performed only by key words. To overcome these obstacles, it is necessary to provide a mash-up platform for the service users to be able to generate their own new mash-up web service on their own comfort and purpose they want. In this paper, we present the key technologies for automatic generation of new mash-up service using open APIs. As the key technologies, ontology modeling method specifying the semantic open API information which is necessary for mash-up, is presented. And, the automatic service mash-up method using the ontology will be presented.

关键词： Web services application program interfaces ontologies (artificial intelligence)

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Implementation of Multicore Communications API 16

Implementation of Multicore Communications API

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16th International Symposium on System-on-Chip (SoC)

作者： Virtanen, Janne Matilainen, Lauri Salminen, Erno Hamalainen, Timo D. Tampere Univ Technol Dept Pervas Comp FIN-33101 Tampere Finland

ISBN: (纸本)9781479968909

This paper presents an implementation of Multicore Communications API (MCAPI), with focus on portability, stability, and simplicity of the design. The main motivation for the implementation is instability of other publicly available implementations. The developed implementation utilizes POSIX message queues, that is an easily portable interface and readily compatible with MCAPI. The performance was measured as latency and transfer rate of the API. The measurement platforms were a x86-64 PC and a development board featuring an ARM processor. A MCAPI implementation was used as reference for comparison. PMQ-MCAPI is much more stable and easily usable than other MCAPI implementations publicly available for PC. When transfer size was between 1-8 KiB, latency of transfers between cores was between 9-15 mu s and transfer rate 500-5000 MBps. This translates to 27 000-45 000 cycles and 0.16-1.67 bytes per cycle. CPU and especially performance of its cache were concluded as the most important factors contributing to the performance. In comparison to the reference, latency of the implementation was 1/8 at best, while transfer rate was up to 35x.

关键词： Unix application program interfaces cache storage multiprocessing systems ARM processor MCAPI implementation PMQ-MCAPI POSIX message queues cache performance development board multicore communication API portability portable interface publicly available implementations stability transfer rate transfer size x86-64 PC Message systems Topology combination rate application programming interfaces Computer based information systems Unix operating system Multiprocessing systems cache storage Portability topology AXIAL POWER INDICATOR API American Petroleum Institute Multi-core processors

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Designing Scalable PGAS Communication Subsystems on Cray Gemini Interconnect

Designing Scalable PGAS Communication Subsystems on Cray Gem...

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19th International Conference on High Performance Computing (HiPC)

作者： Vishnu, Abhinav Daily, Jeff Palmer, Bruce Pacific Northwest Natl Lab 902 Battelle Blvd Richland WA 99352 USA

ISBN: (纸本)9781467323703;9781467323727

The Cray Gemini Interconnect has been recently introduced as a next generation network architecture for building multi-petaflop supercomputers. Cray XE6 systems including LANL Cielo, NERSC Hopper, and the proposed NCSA Blue-Waters, as well as the Cray XK6 ORNL Titan leverage the Gemini Interconnect as their primary Interconnection network. At the same time, programming models such as the Message Passing Interface (MPI) and Partitioned Global Address Space (PGAS) models such as Unified Parallel C (UPC) and Co-Array Fortran (CAF) have become available on these systems. Global Arrays is a popular PGAS model used in a variety of application domains including hydrodynamics, chemistry and visualization. Global Arrays uses Aggregate Remote Memory Copy Interface (ARMCI) as the communication runtime system for Remote Memory Access (RMA) communication. This paper presents a design, implementation and performance evaluation of scalable and high performance communication ARMCI on Cray Gemini. The design space is explored and time-space complexities of communication protocols for one-sided communication primitives such as contiguous and uniformly non-contiguous datatypes, atomic memory operations (AMOs) and memory synchronization is presented. An implementation of the proposed design (referred as ARMCI-Gemini) demonstrates the efficacy on communication primitives, application kernels such as LU decomposition and applications such as Smooth Particle Hydrodynamics (SPH).

关键词： application program interfaces computational complexity message passing parallel processing protocols

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Design and Implementation of a Network Centric Appliance Platform

Design and Implementation of a Network Centric Appliance Pla...

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Brazilian Symposium on Computing System Engineering (SBESC)

作者： Pasetto, Davide Franke, Hubertus Schleupen, Kai Maze, David Penner, Hartmut Achilles, Heather Crawford, Catherine Purcell, Mark IBM Corp Div Res Yorktown Hts NY 10598 USA

ISBN: (纸本)9781467357470;9780769549293

Increasing demands on end-to-end solution performance has lead to a generation of workload optimized systems and appliances, with tightly integrated hardware and software delivering substantial improvements over general purpose architectures. Among the many challenges encountered in designing an appliance, the most complex one is making hardware and software high performance and, at the same time, render the system versatile enough to support as many workloads as possible. This paper provides a high level overview of the design and implementation process of such an appliance architecture, as realized by the IBM PowerEN team. The platform includes new silicon (the PowerEN processor), a novel system level board (Chroma card), system software and development kit, as well as end user applications for different industry domains. The solution has been completely designed by the team, starting from concept, to architecture, to implementation and delivery. The paper describes the most important characteristics of the platform, detailing how these influence its capability of supporting multiple optimized workloads.

关键词： Linux application program interfaces elemental semiconductors local area networks microprocessor chips network interfaces peripheral interfaces system-on-chip

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Evaluating Performance and Power Efficiency of Scientific applications on Multi-threaded Systems 2

Evaluating Performance and Power Efficiency of Scientific Ap...

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E2SC 2nd International Workshop on Energy Efficient Supercomputing

作者： Gioiosa, Roberto Kerbyson, Darren J. Hoisie, Adolfy Pacific Northwest Natl Lab High Performance Comp Grp Richland WA 99354 USA

ISBN: (纸本)9781479970360

The power and energy walls are changing the way users utilize supercomputers: Time-to-completion is not the only important goal but other metrics, such as the energy required to solve a problem or the power efficiency, are becoming as important as performance. This shift towards power- and energy-aware computing is expected to continue in the exascale era, thus, understanding the performance, power and energy implications of different hardware configurations is of paramount importance. In this paper we analyze the performance, power efficiency and energy consumption of scientific applications programmed in MPI, OpenMP and MPI+OpenMP on two different architectures that have take different approaches to limit power consumption, IBM POWER7+ and AMD Interlagos. We compare the scalability, power efficiency and energy consumption of distributed and shared memory versions of each applications and analyze performance and bottlenecks of different combinations of MPI tasks/OpenMP threads. Our results show that, although shared memory programming models usually provide lower synchronization cost, achieving the highest performance/efficiency requires a combination for MPI tasks/ OpenMP threads that is dependent on the underlying architecture and takes into consideration how hardware resources are distributed among the computing elements. More importantly, our results show that the "best configuration" strongly depends on the particular target metric.

关键词： application program interfaces mainframes message passing multi-threading natural sciences computing performance evaluation power aware computing shared memory systems AMD Interlagos IBM POWER7+ MPI OpenMP distributed memory versions energy consumption energy walls energy-aware computing exascale era hardware configurations hardware resources multithreaded systems power efficiency power walls power-aware computing scientific applications shared memory programming models shared memory versions supercomputer time-to-completion Benchmark testing Computer architecture Hardware Instruction sets Measurement Power demand programming dynamic efficiency power aware computing message passing hardware resource Performance Evaluation instruction sets Multithreading Mainframes application programming interfaces supercomputer Benchmark testing mannose phosphate isomerase remote procedure calls shared memory systems Power demand

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Parallel programming Framework for Heterogeneous Computing Environment with Xen Virtualization

Parallel Programming Framework for Heterogeneous Computing E...

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IEEE Region 10 Conference on TENCON 2010

作者： Honjo, Masamitsu Kubota, Atsushi Kitamura, Toshiaki Hiroshima City Univ Grad Sch Informatin Sci Hiroshima Japan

ISBN: (纸本)9781424468904

We propose an unified parallel programming framework which supports both heterogeneity and fault tolerance in MPI programs on a variety of parallel computing platforms. This paper is mainly dedicated to heterogeneity support in our framework. In our framework, a variety of parallel and sequential jobs submitted by multiple users are optimally scheduled on heterogeneous parallel computing environment. To balance the loads among the nodes on such heterogeneous computing environments, some of the parallel processes should be transferred between the nodes. We adopted the migration facility provided by Xen virtualization to realize a load balancing system where an MPI process running on a Xen virtual machine is migrated between the nodes. We confirmed that the protype system offers efficient load balancing facilities for heterogeneous computing environment with low overhead incurred by Xen virtualization.

关键词： MPI programs Xen virtual machine Xen virtualization application program interfaces fault tolerance heterogeneous parallel computing environment load balancing system parallel computing platforms parallel programming parallel sequential jobs resource alloc

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