In-memory computing is an emerging computing paradigm to breakthrough the von-Neumann bottleneck. The SRAM based in-memory computing (SRAM-IMC) attracts great concerns from industries and academia, because the SRAM is...
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In-memory computing is an emerging computing paradigm to breakthrough the von-Neumann bottleneck. The SRAM based in-memory computing (SRAM-IMC) attracts great concerns from industries and academia, because the SRAM is technology compatible with the widely-used MOS devices. The digital SRAM-IMC scheme has advantages on stability and accuracy of computing results, compared with the analog SRAM-IMC schemes. However, few logic operations can be implemented by the current digital SRAM-IMC architectures. Designers have to insert some special logic modules to facilitate the complex computation. To address this issue, this work proposes an area-efficient implementation method of arbitraryboolean function in SRAM array. Firstly, a two-input SRAM LUT is designed to realize the arbitrary two-input booleanfunctions. Then, the logic merging and the spatial merging techniques are proposed to reduce the area consumption of the SRAM-IMC scheme. Finally, the SOP-based SRAM-IMC architecture is proposed, and the merged SOPs are mapped into and computed in it. The evaluation results on LGsynth'91, IWLS'93 and EPFL benchmarks show that, the area of the synthesis results based on the ABC tool is 3.69, 5.72 and 1.86 times of the circuit area from the proposed SRAM-IMC scheme in average respectively. Furthermore, the circuit area from the original SOP-based SRAM-IMC scheme is 2.07, 1.99 and 1.86 times in average of the circuit area from the proposed SRAM-IMC scheme respectively. The performance evaluation results show that the cycle consumption of the proposed SRAM-IMC scheme is independent to the scale of the input booleanfunctions.
The problem of how a single binary higher-order unit can learn an arbitraryboolean function of arbitrarily many variables is discussed. A solution of this problem which exploits all correlations of any order between ...
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The problem of how a single binary higher-order unit can learn an arbitraryboolean function of arbitrarily many variables is discussed. A solution of this problem which exploits all correlations of any order between multiple inputs and their related single outputs is presented. A certain correlation coefficient is given by choosing a certain subset of the set of all inputs, multiplying the corresponding input values, and determining the correlation between this product and the output of the boolean function. The order of this correlation is given by the number-of elements contained in the chosen subset. The number of correlation coefficients to be evaluated equals the number of elements of the power set (set of all subsets) of the set of inputs. The unit is adapted to the given mapping by determining its synaptic weights via a generalized Hebb rule. These weights are exactly the above-mentioned correlation coefficients. Learning is achieved in a one-shot manner, thus each instance of the mapping is presented to the unit exactly one time. A proof is given that this higher-order unit can retrieve the correct function without errors, provided all correlations are known
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