This work-in-progress paper describes a web- based system that is being developed at Ohio University for developing and administering active learning assignments. The paper describes the design of the system, and its ...
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This work-in-progress paper describes a web- based system that is being developed at Ohio University for developing and administering active learning assignments. The paper describes the design of the system, and its intended use in outcomes-based assessment of student learning in Computer Science. The system allows students to access active learning exercises via the web and provides students with immediate feedback on their work. Faculty use the system to design active learning assignments that tie student performance to achievement of specific course outcomes. This work-in-progress paper describes initial experiences with this system in an advanced course where both the software package JFLAP (An Interactive Formal Languages and Automata Package) and C++ programming are used.
Design verification is crucial for successful systems-on-chips (SoCs). However, validating and proving the correctness of SoCs is often a bottleneck in the design project. This paper presents a technique to test the S...
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Design verification is crucial for successful systems-on-chips (SoCs). However, validating and proving the correctness of SoCs is often a bottleneck in the design project. This paper presents a technique to test the SoC at the system level using software application based programs. Our software application level verification methodology (SALVEM) employs test programs composed of dynamic sequences of software code segments. The SALVEM system implements a test generator to create these software test programs automatically. Experiments were conducted applying SALVEM tests to the Altera Nios SoC. A feedback verification flow is also feasible in our SALVEM system. SALVEM test runs are analyzed to direct the test generator toward important SoC scenarios.
When programming a spatial computing medium such as a cellular automaton, the hop count distance to some set of sources (particles) is an often used information. In particular, we consider the case where the sources t...
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When programming a spatial computing medium such as a cellular automaton, the hop count distance to some set of sources (particles) is an often used information. In particular, we consider the case where the sources themselves are moving. When no assumption is made on the size of the medium, that distance takes its values in the set of integers, which is not desirable, because it does not lead to finite state. This paper shows how to use the modulo operation to project that set of integer fields into a set of finite state fields. Using the modulo stored at each site, we show that we are still able to compute the local differential of the original field, allowing to manipulate the former as a directional gradient. It allows us to evaluate the direction of the nearest source, provided the sources move at bounded speed, less than one site per time unit. This information can be used to solve several problems of spatial nature. In the particular case of cellular automata, we present rules for two such problems: Voronoi diagram of moving points and convex hull.
The future design of large and complex building automation systems (BAS) needs to be increasingly efficient. The usage of prefabricated devices and design patterns alone is insufficient to face complex demands. New au...
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The future design of large and complex building automation systems (BAS) needs to be increasingly efficient. The usage of prefabricated devices and design patterns alone is insufficient to face complex demands. New automated design approaches not only need to take over recurrent tasks, they also have to integrate more direct and smoother methods into the overall design process. This paper addresses that broad scope by introducing an automated functional design concept for BAS. Following a continuous top-down design starting at a platform-independent functional level, a semiautomatic composition over different levels of abstraction towards a full-developed and industry-spanning BAS network is accomplished. Here, devices from different manufacturers are integrated into a properly operating system by incorporating formal interoperability checks. The predominant technologies of the proposed automated design approach are ontologies, generative programming and evolutionary algorithms.
A novel specification driven and constraints solving based method to automatically generate test programs from simple to complex ones for advanced microprocessors is presented in this paper. Our microprocessor archite...
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A novel specification driven and constraints solving based method to automatically generate test programs from simple to complex ones for advanced microprocessors is presented in this paper. Our microprocessor architectural automatic test program generator (MA/sup 2/TG) can produce not only random test programs but also a sequence of instructions for a specific constraint by specifying a user constraints file. The proposed methodology makes three important contributions. First, it simplifies the microprocessor architecture modeling and eases adoption of architecture modification via architecture description language (ADL) specification. Second, it generates test programs for specific constraints utilizing the power of state-to-art constraints solving techniques. Finally, the number of test program for microprocessor verification and the verification time are dramatically reduced. We applied this method on DLX processor to illustrate the usefulness of our approach.
In this paper, we present our original approach to the model-based statistical usage testing of a class of communication protocol implementations that are based on the state design pattern and Java programming environ...
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In this paper, we present our original approach to the model-based statistical usage testing of a class of communication protocol implementations that are based on the state design pattern and Java programming environment augmented with the class FSMSystem. The approach is based on the working environment that has been proven on a number of real-world projects. The working environment is created with the following set of tools: generic modeling environment with the operational profile model paradigm registered to it, operational profile model interpreter, generic test case generator, test case compiler, and the unit testing framework JUnit extended with the class TestBed that acts as both test driver and stub thus providing the complete test harness. In the paper, we present the methodology of the model-based statistical usage testing of a class of communication protocol implementations, the tools that support this methodology, and the case study - the model based statistical usage testing of SIP INVITE client transaction, a part of the SIP protocol stack
The aim of developing a visual programming language is not achieved when the implementation of programs is possible, but still, as in the textual world, a complete software environment is needed. This paper describes ...
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The aim of developing a visual programming language is not achieved when the implementation of programs is possible, but still, as in the textual world, a complete software environment is needed. This paper describes an improvement of the function container of VisaVis. The flat 2-dimensional way of accessing functions is replaced by a hierarchical and 3-dimensional one. Cone Trees are extended by a query language into Cone Graphs. The basic concept of user interaction, substitution, was taken from VisaVis. For the optimization of user interaction, a user interface prototype has been developed.< >
We report on one organization's experience making process changes in a suite of projects. The changes were motivated by clients' requests for better time estimates, better quality, better stability and more re...
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We report on one organization's experience making process changes in a suite of projects. The changes were motivated by clients' requests for better time estimates, better quality, better stability and more reliable test scheduling resulting from the high number of bug reports and constant delivery delays. The teams embarked on a series of top-down process changes inspired by the IBM Rational Unified Process. Changes included adopting the Rational Tools, introducing iterative development, and later the hiring of a formal manual testing team and support for refactoring activities. To assess the impact of these changes we have collected fault data from 23 releases of the systems including releases from before and after these changes were introduced. In this report we discuss the challenges and impact of these process changes, and how the development teams leveraged these successes to gradually introduce other process improvements in a bottom-up fashion.
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