In designing fuzzy models to short-term load forecasting (STLF), we encounter a major difficulty in the identification of optimized fuzzy rule bases, which are traditionally obtained by trial and error. An approach to...
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ISBN:
(纸本)0780382730
In designing fuzzy models to short-term load forecasting (STLF), we encounter a major difficulty in the identification of optimized fuzzy rule bases, which are traditionally obtained by trial and error. An approach to automatic design of optimal fuzzy rule bases using AEP (accelerated evolutionary programming) is proposed to construct the fuzzy models for short-term load forecasting. According to this approach, identification of the premise part and the consequence part is simultaneously accomplished, and the models complexity is also reduced compared to other fuzzy models. This method was tested on the Zhejiang Power Company's load data and the performances of the proposed method are compared to those of artificial neural network (ANN) models. The comparisons indicate the better performance of the proposed method.
This article examines data base description problems from the point of view of logic programming, and presents an experimental deductive data base system implemented in PROLOG. We first discuss the advantages of logic...
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This article examines data base description problems from the point of view of logic programming, and presents an experimental deductive data base system implemented in PROLOG. We first discuss the advantages of logic for describing data bases, in a general manner, and then its application to our particular data base system. The incidence of natural language consultation capabilities upon the system's characteristics is briefly considered, and then we formally define our concept of a data base. Next we delimit which part of a data base's description is system-controlled, and which part is defined by the-user, entering into the details where the user's description is concerned. Finally, we show some examples of a data base consultation that were tested in our system.
programming multi-processor systems-on-chip (MPSoC) involves partitioning and mapping of sequential reference code onto multiple parallel processing elements. The immense potential available through MPSoC architecture...
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ISBN:
(纸本)9781595936271
programming multi-processor systems-on-chip (MPSoC) involves partitioning and mapping of sequential reference code onto multiple parallel processing elements. The immense potential available through MPSoC architectures depends heavily on the effectiveness of this programming. Existing automatic parallelizing techniques, though effective on shared memory architectures, are insufficient for MPSoCs, which are typically characterized by heterogeneous processing elements and memory architectures. The lack of effective automatic techniques requires designers to manually partition the code and the data structures in the reference application to generate a parallel and flexible specification. Manual creation of this model is time consuming and error prone. In this work, we present a novel designer-controlled approach to partition existing code and data structures automatically into a parallel and flexible abstract specification model that can be mapped to a heterogeneous MPSoC. Our results show significant productivity gains and improvements in the end design.
This paper presents the rational and design evolution for the use of MIL-STD-1553 designs incorporating a universal serial bus interface. The discussion is centered on designs used on notebook class computers to perfo...
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This paper presents the rational and design evolution for the use of MIL-STD-1553 designs incorporating a universal serial bus interface. The discussion is centered on designs used on notebook class computers to perform software loading and verification using the 1553 bus. Advantages over using similar solutions, such as the commonly available PCMCIA/1553 interfaces, are described.
Abstract interpretation can be applied to speed up constrained combinatorial search. The approximations used are supersets of the constraints. The authors study an instance of this method by selecting as the supersets...
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Abstract interpretation can be applied to speed up constrained combinatorial search. The approximations used are supersets of the constraints. The authors study an instance of this method by selecting as the supersets the cylindrical closures of Ashby (1964). The result is the method of pruning by cylindrical closure (PCC). When the closures are of order 1 and the constraints are binary, the arc consistency method of Mackworth (1977) is obtained. In the nonbinary case one gets the lookahead inference of CHIP. PCC with closure of order higher than 1 yields new consistency methods.< >
The new LHC experiments at CERN have very large numbers of channels to operate. In order to be able to configure and monitor such large systems, a high degree of parallelism is necessary. The control system is built a...
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The new LHC experiments at CERN have very large numbers of channels to operate. In order to be able to configure and monitor such large systems, a high degree of parallelism is necessary. The control system is built as a hierarchy of sub-systems distributed over several computers. A toolkit $SMI++, combining two approaches: finite state machines and rule-based programming, allows for the description of the various sub-systems as decentralized deciding entities, reacting in real-time to changes in the system, thus providing for the automation of standard procedures and for the automatic recovery from error conditions in a hierarchical fashion. In this paper we describe the principles and features of SMI++ as well as its integration with an industrial SCADA tool for use by the LHC experiments and we try to show that such tools, can provide a very convenient mechanism for the automation of large scale, high complexity, applications
Denial of service (DoS) attacks is a well-known problem with victims even among prestigious commercial sites. Such attacks in traditional networking are difficult to recognize and to handle. An active infrastructure t...
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Denial of service (DoS) attacks is a well-known problem with victims even among prestigious commercial sites. Such attacks in traditional networking are difficult to recognize and to handle. An active infrastructure that can dynamically respond to event-triggered requests can deal better with recognition and handling of DoS attacks. We present a DoS attack response system architecture and we demonstrate via an application scenario its dynamicity and flexibility in dealing with this kind of attack. The approach is based on agent-enabled active programmable infrastructures and makes heavy use of mobile agent technology in order to asynchronously respond to critical situations. Finally, we comment on the pros and cons of our approach and discuss future directions that could be followed.
Aristotelian syllogism is traditional logic which is considered as un-formalized normally. The paper formalized Aristotelian syllogism as the forms of propositions with all the rules for getting the valid forms (figur...
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Aristotelian syllogism is traditional logic which is considered as un-formalized normally. The paper formalized Aristotelian syllogism as the forms of propositions with all the rules for getting the valid forms (figures).Based on the results, an automatic system are developed using VC++ and MFC (Microsoft Foundation Class). For any Aristotelian syllogism which are divided into 4 types named as 4 figures and numbered totally 256, the valid conclusions can be output when users input the premises of a Aristotelian syllogism. The core codes and the methods of transforming Aristotelian syllogism logic into programming logic are presented.
In the context of heterogeneous networks, like clusters of workstations, the design of programming and execution environments aims both to easily express parallelism and distribution of applications, at conception lev...
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In the context of heterogeneous networks, like clusters of workstations, the design of programming and execution environments aims both to easily express parallelism and distribution of applications, at conception level, and to adapt automatically their execution to fluctuations that may appear in the evolution of applications or in resources availabilities. We present the ADAJ environment (adaptive distributed applications in Java), targeted towards Java applications, which addresses these aims, through conceptual tools offered by the programming environment and through a dynamic load balancing mechanism, integrated at the middleware level. At a conception level, the developer has the possibility of easily activating processing in a MIMD programming model, using library calls. At the execution level, the efficiency of execution in ADAJ exploits an observation mechanism, which allows to acquire information on processing behaviour in order to dynamically redistribute load, by object migrations.
A discussion of dual microprocessors in a split-bus configuration to acquire and record sensor data and how this architecture is applied to a recording system is the objective of this paper. The data is collected usin...
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A discussion of dual microprocessors in a split-bus configuration to acquire and record sensor data and how this architecture is applied to a recording system is the objective of this paper. The data is collected using several kinds of expendable probes deployed from ship and aircraft platforms. These self-contained units automatically acquire and record the information received and provide basic operational facilities including optional programming, real time digital display and status items as well as system self tests. The function of data storage is provided by cassette recording. There are also external strip chart outputs as well as data transmission capabilities within these systems. To the user, these systems offer a simple operating task and are flexible enough to apply to different variations in data acquisition requirements.
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