The circuit board manufacturing community is now ready to embrace the concept of moving probe in-circuit test systems, also known as Flying Probers. This is due not only to the ability of Flying Probers to eliminate t...
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The circuit board manufacturing community is now ready to embrace the concept of moving probe in-circuit test systems, also known as Flying Probers. This is due not only to the ability of Flying Probers to eliminate the cost of fixturing, but also to their new ability to satisfy the overall test requirements. This opens up the opportunity to test a new class of boards that are not cost effective to test on fixture based systems, and were not able to be tested on previous Flying Probe test systems. Requirements such as prototype development, low to medium volume manufacturing, high net count boards, and field returns are examples of prime targets for Flying Probers. What then are the capabilities a user should look for in a Flying Prober that will insure its most effective overall use as a quick-turn around, highly flexible test tool? An attempt is made to answer this question.
Current software development is often quite code-centric and aimed at short-term deliverables, due to various contextual forces (such as the need for new revenue streams from many individual buyers). We’re interested...
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Too often, when software is being developed, the software engineers do not sufficiently consider how easy the system will be to use and learn. Following the steps of other related works developed in our research group...
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ISBN:
(纸本)0769508340
Too often, when software is being developed, the software engineers do not sufficiently consider how easy the system will be to use and learn. Following the steps of other related works developed in our research group, the paper deals with the problems of gathering information on the conceptual level about the interface characteristics of the applications that are generated in an automatic way using the OO-Method (O. Pastor et al., 1997; 1998). The basic idea is to include in the conceptual modelling process both the functionality and interface characteristics for obtaining a complete application that implements the systems modelled using the underlying object oriented approach. The "OO-Method" is based not only on the object oriented paradigm but also on the automatic programming paradigm. It combines the advantages of formal specification systems with the practice provided by conventional object oriented methodologies. After presenting a description of the OO-Method, the core of the paper focuses on how to collect interface information at the conceptual level, using a technique based on the identification of conceptual interface patterns which are independent of any implementation detail. The corresponding extensions to the OO-Method Conceptual Modelling notation that are necessary for modelling interfaces are presented.
An experimental framework for assessing process formalisms from project members' points of view is proposed. This framework is based on the goal/question/metric paradigm and uses role definitions to state the asse...
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An experimental framework for assessing process formalisms from project members' points of view is proposed. This framework is based on the goal/question/metric paradigm and uses role definitions to state the assessment goals. The assessment goals are then used to identify the information that must be supplied by a formalism to support a project role. The feasibility of this framework is demonstrated using the ISPW-6 software process example. A number of example roles are identified, and example hypotheses are derived for some of the formalisms used.< >
Several concepts which are the focus of software technology at the US Air Force Avionics Laboratory are discussed: automatic programming, software fault tolerance, reusable software, expert code modification, common A...
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Several concepts which are the focus of software technology at the US Air Force Avionics Laboratory are discussed: automatic programming, software fault tolerance, reusable software, expert code modification, common Ada run-time systems, and modular embedded software for distributed systems. These concepts apply to three phases of avionics systems life: conceptual, developmental, and operational. It is noted that breakthroughs in any one of these concepts will result in an order-of-magnitude improvement in the operations, performance, and maintenance of avionics in tactical weapon systems.< >
This paper deals with experience with specification languages at AEROSPATIALE Aircraft, Systems and Avionics Division. We describe first the current avionics development environment. Then, we present our results and v...
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This paper deals with experience with specification languages at AEROSPATIALE Aircraft, Systems and Avionics Division. We describe first the current avionics development environment. Then, we present our results and viewpoints on the use of the three specification languages: LOTOS, ESTEREL, and B. The evaluation studies we performed, showed that each of these languages does not cover in a complete way our needs in specification, validation, and development of avionics. Afterwards, we propose and illustrate an investigation approach that allows to structure and compose different formal specification languages in the same environment.
The many-core design paradigm requires llexible and modular hardware and software components to provide the required scalability of next-generation on-chip multiprocessor architectures. A multidisciplinary approach is...
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The many-core design paradigm requires llexible and modular hardware and software components to provide the required scalability of next-generation on-chip multiprocessor architectures. A multidisciplinary approach is necessary to consider all the interactions between the different components of the design. In this work a complete design methodology is proposed, tackling at once the aspects of hardware architecture, programming model and design automation. The proposed design flow has been used in the implementation of a multiprocessor Network-on-Chip based system, the NoCRay graphic accelerator. The system uses 8 Tensilica LX processors and has been physically implemented on a Xilinx Virtex-4 LX-160 FPGA reporting a 17.3M equivalent gate-count. Performance are compared with a commercial general purpose processor and show good results considering the low frequency of the prototype.
A scheme for programmable logic array (PLA) decomposition that consists of one level of PLAs followed by a second level of simple two-input logic gates is presented. The propagation delay is therefore the sum of the d...
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A scheme for programmable logic array (PLA) decomposition that consists of one level of PLAs followed by a second level of simple two-input logic gates is presented. The propagation delay is therefore the sum of the delay through one level of PLA and one level of two-input gates. Since the delay through a two-input gate is significantly less than that through a PLA, the timing performance of the new scheme is generally superior to those of earlier PLA decomposition schemes. The sizes of the PLAs used depend on the choice of the two-input gates. An algorithm is presented that chooses the functionality of the gates such that the areas of the first-level PLAs are minimized, further improving performance. The new decomposition scheme was developed for the automatic programming of a programmable logic device (PLD) which had basically a three level architecture. The functional unit for such a PLD is described and the application of the algorithm to the programming of these functional units is discussed. Experimental results show that the new scheme significantly reduces the area over the single PLA implementation.< >
This paper presents a correct-by-construction synthesis method for generating operating system based device drivers from a formally specified device behavior model. Existing driver development is largely manual using ...
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ISBN:
(纸本)1581137427
This paper presents a correct-by-construction synthesis method for generating operating system based device drivers from a formally specified device behavior model. Existing driver development is largely manual using an ad-hoc design methodology. Consequently, this task is error prone and becomes a bottleneck in embedded system design methodology. Our solution to this problem starts by accurately specifying device access behavior with a formal model, viz. extended event driven finite state machines. We state easy check soundness conditions on the model that subsequently guarantee properties such as bounded execution time and deadlock-free behavior. We design a deadlock-free resource accessing scheme for our device access model. Finally, we synthesize an operating system (OS) based event processing mechanism, which is the core of the device driver, using a disciplined methodology that assures the correctness of the resulting driver. We validate our synthesis method using two case studies: an infrared port and the USB device controller for an SA1100 based handheld. Besides assuring a correct-by-construction driver, the size of the specification is 70% smaller than a manually written driver, which is a strong indicator of improved design productivity.
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