A novel video compression scheme that exploits the idea of second-order-residual (SOR) coding is proposed for high-bit-rate video applications in this work. We first study the limitation of today's high performanc...
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(纸本)9780819479365
A novel video compression scheme that exploits the idea of second-order-residual (SOR) coding is proposed for high-bit-rate video applications in this work. We first study the limitation of today's high performance video coding standard, H.264/AVC, and show that it is not effective in the coding of small image features and variations for high-bit-rate video contents. For low to medium quality video streams, these small image features can be removed by the quantization process. However, when the quantization stepsize becomes small in high-bit-rate video, their existence degrades the rate-distortion coding performance significantly. To address this problem, we propose a coding scheme that decomposes the residual signals into two layers: the first-order-residual (FOR) and the second-order-residual (SOR). The FOR contains low frequency residuals while the SOR contains the high frequency residuals. We adopt the H.264/AVC for the FOR coding and propose two schemes, called SOR-freq and SOR-bp, for the SOR coding. It is shown by experimental results that the proposed FOR/SOR scheme outperforms H.264/AVC by a significant margin (with about 20% bit rate saving) in high-bit-rate video.
JPEG2000 will be the international standard to continuous-tone still image coding in next generation. JPEG2000 algorithm is different from JPEG algorithm in filtering and entropy coding. In this thesis,we propose BPC ...
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JPEG2000 will be the international standard to continuous-tone still image coding in next generation. JPEG2000 algorithm is different from JPEG algorithm in filtering and entropy coding. In this thesis,we propose BPC hardware design based on parallel pass to improve performance. Hardware module which performs the bit plane coding (BPC) operation is designed by Verilog-HDL and synthesized by QuartusⅡ. As a result of implementing BPC hardware,a speed gain of about 2 times is achieved when a process did BPC by based on serial pass.
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