Based on analyzing the operation character of block ciphers,we set forth a solution for efficient cryptographic processing,and put forward a parallelco-processor architecture for block ciphers,which supports word and...
详细信息
Based on analyzing the operation character of block ciphers,we set forth a solution for efficient cryptographic processing,and put forward a parallelco-processor architecture for block ciphers,which supports word and sub-word parallel processing,and its micro realization is schemed out *** design gives attention to two aspects which is flexibility and high performance,including consummate control capability,efficient operation capability,and reconfigurable cipher process ***,in synthesis,the design is fabricated on 0.18um CMOS cells through Design compiler tool,and the performance of this co-processor is compared to other hardware/software implementation.
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