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Fast full search algorithm using adaptive matching scan based on gradient magnitude

IEICE TRANSACTIONS ON COMMUNICATIONS 2001年第3期E84B卷 694-697页

作者： Kim, JN Choi, TS KJIST Dept Mechatron Puk Gu Kwangju 500712 South Korea

To reduce an amount of computation of full search algorithm for fast motion estimation, we propose a new and fast matching algorithm without any degradation of predicted images. The computational reduction without any degradation comes from adaptive matching scan algorithm according to the image complexity of the reference block in current frame. Experimentally, ae significantly reduce the computational load compared with conventional full search algorithm.

关键词： motion estimation block matching algorithm fast full search adaptive matching scan partial distortion elimination

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A new programmable video signal processor for motion estimation and motion compensation

A new programmable video signal processor for motion estimat...

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Conference on Visual Communications and Image Processing 2001

作者： Gong, D He, Y Tsinghua Univ Dept Elect Engn State Key Lab Microwave & Digital Commun Beijing 100084 Peoples R China

ISBN: (纸本)0819439886

A new programmable and parallel video signal processor (PVSP) is proposed to implement a class of fast block matching algorithms (BMA). Five parameters are used to embody the various fast BMAs and a generic framework for the fast BMA is designed. Then PVSP is designed and the BMA algorithms are mapped onto it. The key modules of PVSP are discussed in details. PVSP uses horizontal and vertical mapping strategies to implement byte-aligned and circular addressing. Under these two mapping strategies the memory system of PVSP can be configured flexibly. The regular, iterative and low-delay tree adder without any pipeline stages is chosen as the key computation component to implement the BMA. With scalable tree adder, PVSP can be easily expanded to meet higher computing requirement. PVSP is estimated to have approximately 30kGates and 40kb SRAM and it can work at the frequency of 133MHz. It can support the motion estimation and motion compensation tasks in real-time for MPEG2 MP@ML encoder.

关键词： motion estimation block matching algorithm programmable video signal processor byte-aligned and circular addressing tree adder

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An efficient search strategy for block motion estimation using image features

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IEEE TRANSACTIONS ON IMAGE PROCESSING 2001年第8期10卷 1223-1238页

作者： Chan, YL Siu, WC Hong Kong Polytech Univ Dept Elect & Informat Engn Ctr Multimedia Signal Proc Kowloon Hong Kong Peoples R China

block motion estimation using the exhaustive full search is computationally intensive, Fast search algorithms offered in the past tend to reduce the amount of computation by limiting the number of locations to be searched. Nearly all of these algorithms rely on this assumption: the MAD distortion function increases monotonically as the search location moves away from the global minimum. Essentially, this assumption requires that the MAD error surface be unimodal over the search window Unfortunately, this is usually not true in real-world video signals. However, we can reasonably assume that it is monotonic in a small neighborhood around the global minimum, Consequently, one simple strategy, but perhaps the most efficient and reliable, is to place the checking point as close as possible to the global minimum. In this paper, some image features are suggested to locate the initial search points. Such a guided scheme is based on the location of certain feature points. After applying a feature detecting process to each frame to extract a set of feature points as matching primitives, we have extensively studied the statistical behavior of these matching primitives, and found that they are highly correlated with the MAD error surface of real-world motion vectors. These correlation characteristics are extremely useful for fast search algorithms. The results are robust and the implementation could be very efficient. A beautiful point of our approach is that the proposed search algorithm can work together with other block motion estimation algorithms. Results of our experiment on applying the present approach to the block-based gradient descent search algorithm (BBGDS), the diamond search algorithm (DS) and our previously proposed edge-oriented block motion estimation show that the proposed search strategy is able to strengthen these searching algorithms. As compared to the conventional approach, the new algorithm, through the extraction of image features, is more robust, pro

关键词： block matching algorithm image features extraction motion estimation motion vector

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A multilevel successive elimination algorithm for block matching motion estimation

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IEEE TRANSACTIONS ON IMAGE PROCESSING 2000年第3期9卷 501-504页

作者： Gao, XQ Duanmu, CJ Zou, CR SE Univ Dept Radio Engn Nanjing 210096 Peoples R China

An efficient algorithm is proposed to reduce the computation cost of block matching algorithms for motion estimation in video coding. Based on a new insight in block matching algorithms, we extend the successive elimination algorithm to a multilevel case. By using the sum norms of the blocks and the subblocks, tighter and tighter decision boundaries can be obtained for eliminating the search positions. The efficiency of the proposed algorithm combined with full search algorithm and several fast search algorithms is verified by simulation results.

关键词： block matching algorithm motion estimation successive elimination algorithm video coding

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A reconfigurable VLSI coprocessing system for the block matching algorithm

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IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 1997年第3期5卷 329-337页

作者： Bugeja, A Yang, WW HARVARD UNIV DIV ENGN & APPL SCICAMBRIDGEMA 02138

Several VLSI architectures for the full-search block matching algorithm have been proposed in recent years due to its computation and I/O-intensive nature and its importance in various computer vision and image processing applications, This paper presents a new coarse grained reconfigurable coprocessor which is suitable for integration with general purpose microprocessors. The 180 000 transistor custom VLSI design was implemented in 0.6 mu m CMOS on a 4.12 mm x 2.59 mm die and has been fully tested up to 33 MHz. For a typical image database search application, a sample system consisting of four coprocessors interfaced through a 33 MHz PCI bus will provide a speedup of 320x over an 80486 DX2/66 MHz and 64x over a 150-MHz Pentium running fully optimized assembly code.

关键词： block matching algorithm image correlation image processing reconfigurable VLSI

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Fast hierarchical block matching algorithm utilizing spatial motion vector correlation

Fast hierarchical block matching algorithm utilizing spatial...

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1997 Conference on Visual Communications and Image Processing

作者： Lim, KW Song, BC Ra, JB Korea Advanced Institute of Science and Technology (South Korea)

ISBN: (纸本)0819424358

A new hierarchical block matching algorithm specially proper for a large search area, is proposed. The algorithm utilizes the spatial motion vector correlation under the fixed hierarchical search structure. Motion vectors of the causally neighboring blocks can be used to predict the motion vector of the current block, if the spatial motion vector correlation is strong. However, they are not helpful for searching complex or random motion. The proposed algorithm consists of two level searching steps. The higher one selects two initial estimates, one obtained by using motion vector correlation for continuous-motion, the other by using minimum mean absolute difference (MAD) for random or complex motion among rectangularly-sampled motion vector candidates in the search area, and the lower one is for the final motion vector refinement. Compared with previous hierarchical block matching algorithms, the scheme improves the accuracy of the estimated motion vector for random/complex motion as well as continuous motion. It is also proper for hardware implementation because of simple, fast, and regular search procedure. Simulation results show that the proposed algorithm drastically reduces the computational complexity to 5.0% of that of full search block matching algorithm, with the minor PSNR degradation of 0.4 dB even in the worst case.

关键词： motion estimation block matching algorithm hierarchical search

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The gray prediction search algorithm for block motion estimation

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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY 1999年第6期9卷 843-848页

作者： Jou, JM Chen, PY Sun, JM Natl Cheng Kung Univ Dept Elect Engn Tainan 70101 Taiwan

Due to the temporal and spatial correlation of the image sequence, the motion vector of a block is highly related to the motion vectors of its adjacent blocks in the same image frame. If we can obtain useful and enough information from the adjacent motion vectors, the total number of search points used to find the motion vector of the block may be reduced significantly, Using that idea, an efficient gray prediction search (GPS) algorithm for block motion estimation is proposed in this paper. Based on the gray system theory, the GPS can determine the motion vectors of image blocks quickly and correctly. The experimental results show that the proposed algorithm performs better than other search algorithms, such as 3SS, CS, PHODS, 4SS, BBGDS, SES, and PSA, in terms of six different measures: 1) average mean square error per pixel;2) average peak signal-to-noise ratio;3) average prediction errors per pixel;4) average entropy of prediction errors;5) average percentage of unpredictable pels per frame;and 6) average search points per block.

关键词： block matching algorithm gray prediction motion estimation motion vector temporal redundancy

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Hybrid block matching algorithm for motion estimation

Hybrid block matching algorithm for motion estimation

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Conference on Digital Compression Technologies and Systems for Video Communications

作者： Pao, TL Wu, JS TATUNG INST TECHNOL DEPT COMP SCI & ENGNTAIPEI 104TAIWAN

ISBN: (纸本)0819423564

Motion compensation is a key operation in video compression to remove the temporal redundancy in a video sequence. One of the application examples is the MPEG video compression standard. The most commonly used motion estimation algorithm is the block matching algorithm due to its regularity. Full search is the most straight forward block matching algorithm which can always locate the optimal motion vector. However, its computational complexity makes it impractical in real time applications. Fast algorithm required less computation but the obtained motion vector is suboptimal. In this paper, a hybrid block matching algorithm is proposed. In this algorithm, average intensities of groups of pixels are used to roughly estimate the motion first. Then, the fast search algorithm is applied in a reduced search region centered around the result of the first pass. Experimental results show that the performance of the estimation accuracy is quite close to that of the full search algorithm while the computational complexity is only slightly increased with respect to those fast algorithms.

关键词： motion estimation motion compensation block matching algorithm video sequence coding

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A three-dimensional instrumentation VLSI processor based on a concurrent memory-access scheme

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IEICE TRANSACTIONS ON ELECTRONICS 1997年第11期E80C卷 1491-1498页

作者： Lee, S Hariyama, M Kameyama, M Graduate School of Information Sciences Tohoku University Sendai-shi 980-8579 Japan

Three-dimensional (3-D) instrumentation using an image sequence is a promising instrumentation method for intelligent systems in which accurate 3-D information is required. However, real-time instrumentation is difficult since much computation lime and a large memory bandwidth are required. In this paper, a 3-D instrumentation VLSI processor with a concurrent memory-access scheme is proposed. To reduce the access time, frequently used data are stored in a cache register array and are concurrently transferred to processing elements using simple interconnections to the 8-nearest neighbor registers. Based on a row and column memory access pattern, we propose a diagonally interleaved frame memory by which pixel Values of a row and column are stored across memory modules. Based on the concurrent memory-access scheme, a 40 GOPS vprocessor is designed and the delay time for the instrumentation is estimated to be 42 ms for a 256x256 images.

关键词： 3-D instrumentation epipolar constraint block matching algorithm special-purpose VLSI processor memory interleaving

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A LIP-TRACKING SYSTEM BASED ON MORPHOLOGICAL PROCESSING AND block matching TECHNIQUES

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SIGNAL PROCESSING-IMAGE COMMUNICATION 1994年第4期6卷 335-348页

作者： MAK, MW ALLEN, WG NORTHUMBRIA UNIV DEPT ELECT ELECTR ENGN & PHYSNEWCASTLE NE1 8STENGLAND

This paper describes the application of image processing techniques in extracting the lip kinematics parameters (velocity and displacement) from image sequences. The centres of the lips are located by morphological image processing and cluster analysis. The motion of the lips is determined by a block matching algorithm. The paper presents a modified block matching algorithm which solves the problems caused by uniform shading and texture. The paper also describes a method which transforms the motion vectors into lip velocities and displacements. Moreover, the correlation between the lip information and the speech signals is demonstrated. Finally, the paper explains how the lip-tracking system can be applied to speech segmentation. The principal results show that lip information alone is not sufficient for speech segmentation. However, lip information may assist an audio speech segmentation system if the speech signals are corrupted by noise.

关键词： LIP-READING MORPHOLOGICAL IMAGE PROCESSING block matching algorithm MOTION VECTOR MOTION ESTIMATION ARTICULATORY DYNAMICS SPEECH SEGMENTATION

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