检索结果-内蒙古大学图书馆

An area-effective and low-power single-slope ADC for DCG imaging cmos image sensor

INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS 2025年第1期53卷 1-12页

作者： Yang, Rui Wang, Xiuyu Liu, Changju Ma, Biao Nie, Kaiming Xu, Jiangtao Tianjin Univ Sch Microelect Tianjin Key Lab Imaging & Sensing Microelect Techn Tianjin Peoples R China Chongqing Optoelect Res Inst Chongqing Peoples R China

This paper introduces an area-effective and low-power readout circuit structure tailored for high dynamic range (HDR) cmos image sensors (CISs) utilizing dual conversion gain (DCG) imaging technology. A switched capacitor amplifier, which is applied at the comparator input port of the column-parallel single-slope analog-to-digital converter (SS ADC), is proposed to compensate for the charge injection and clock feed-through introduced when the pixel switches between high conversion gain (HCG) and low conversion gain (LCG) modes. The proposed SS ADC is supplemented by the integration of a configurable counter, and the counter is specifically crafted for performing the A/D conversion of the readout voltage within a DCG pixel. Compared to the conventional DCG readout circuit, the proposed readout circuit use only one ADC for A/D conversion of HCG signals and LCG signals, which greatly reduces the area and power consumption of the readout circuit. Simulation results under 110 nm cmos technology illustrate that the proposed 10-bit SS ADC has a DNL of +0.78/-0.91 LSB and an INL of +1.91/-1.69 LSB, with a SNR of 57.2 dB and a SNDR of 55.95 dB, corresponding to an ENOB of 9 bits. The power consumption of the proposed SS ADC is 56.4 mu W per column with a conversion time of 12 mu s, and the simulation results show that the power consumption is 23.35% lower than the conventional structure and the area is saved by 24.69%. This paper introduces a readout circuit structure tailored for high dynamic range CISs utilizing DCG imaging technology, using only one ADC for A/D conversion of HCG signals and LCG signals, which greatly reduces the area and power consumption of the readout circuit. image

关键词： area-effective cmos image sensor dual conversion gain low-power single-slope ADC

来源：评论

学校读者我要写书评

暂无评论

A Low Noise 8.3-Mpixel cmos image sensor With Selectable Multiple Sampling Technique by 5.36 GHz Global Counter and Dual Latch Skew Canceler

引用

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS 2025年第3期72卷 1105-1113页

作者： Iizuka, Yoichi Maezono, Akihide Saito, Wataru Takami, Kazuhiko Morishita, Fukashi Renesas Elect Corp Kodaira 1878588 Japan

This document presents a cmos image sensor (CIS) with a high-speed single slope ADC(SS-ADC) that has a novel high-speed counter and can reduce temporal noise in a wide range of frequency components by enabling correlated multiple sampling (CMS) and digital correlated double sampling (DCDS) at high frame rates. The test chip was fabricated in 55nm process and has 8.3M pixels. The counter was confirmed to operate at a frequency equivalent to 5.36GHz. It uses a circuit and dedicated counter code that suppresses differential non-linearity (DNL) deterioration due to faster counter speeds. When CMS is performed 4 times at 30 frames per second (fps), the random noise is 187uVrms, which is a 31% improvement in noise compared to when CMS is not performed.

关键词： Noise Codes Circuits Clocks Reflective binary codes Frequency conversion Delays Voltage Latches Surveillance SS-ADC cmos image sensor noise reduction high speed counter correlated multiple sampling

来源：评论

学校读者我要写书评

暂无评论

cmos image sensor-based ELISA detector using lens-free shadow imaging platform

引用

sensorS AND ACTUATORS B-CHEMICAL 2014年 196卷 511-517页

作者： Lee, Junhee Kwak, Yeon Hwa Paek, Se-Hwan Han, Seungoh Seo, Sungkyu Korea Univ Dept Elect & Informat Engn Sejong South Korea Korea Elect Technol Inst Songnam South Korea Korea Univ Dept Biotechnol & Bioinformat Sejong South Korea Hoseo Univ Fus Technol Lab Asan South Korea

This paper presents a compact and cost-effective lens-free complementary metal-oxide-semiconductor (cmos) image sensor based bacterial cell detection platform that can measure colorimetric light signals in the enzyme linked immunosorbent assay (ELISA) process. In this work, we first demonstrate the cmos image sensor based shadow imaging platform as an ELISA detector and provide critical performance data that show this platform to be comparable or even better than that of a commercial ELISA reader. To evaluate the efficacy of the shadow imaging platform-based ELISA detector as a practical approach, the pathogenic bacteria Listeria monocytogenes (L. monocytogenes) and Salmonella typhimurium (S. typhimurium) were utilized within a conventional 96-well plate. To reduce the noise signal from unwanted particles and light scattering, a custom-made aperture cover and image processing procedures were developed. Because this platform employs a multi-million pixel cmos image sensor enabling effective removal of noise signals that can not be achieved with a single pixel detector, i.e., conventional ELISA reader, it can perform more reproducible ELISA measurement. Combined with the shadow imaging technique, this approach holds great promise in many applications including blood analysis, pathogen detection, and environmental monitoring. (C) 2014 Elsevier B.V. All rights reserved.

关键词： cmos image sensor LED ELISA Listeria monocytogenes Salmonela typhimurium Shadow imaging technique

来源：评论

学校读者我要写书评

暂无评论

cmos image sensor With Per-Column ΣΔ ADC and Programmable Compressed Sensing

引用

IEEE JOURNAL OF SOLID-STATE CIRCUITS 2013年第1期48卷 318-328页

作者： Oike, Yusuke El Gamal, Abbas Sony Corp Atsugi Kanagawa 2430014 Japan Stanford Univ Dept Elect Engn Stanford CA 94305 USA

A cmos image sensor architecture with built-in single-shot compressed sensing is described. The image sensor employs a conventional 4-T pixel and per-column Sigma Delta ADCs. The compressed sensing measurements are obtained via a column multiplexer that sequentially applies randomly selected pixel values to the input of each Sigma Delta modulator. At the end of readout, each ADC outputs a quantized value of the average of the pixel values applied to its input. The image is recovered from the random linear measurements off-chip using numerical optimization algorithms. To demonstrate this architecture, a 256x256 pixel cmos image sensor is fabricated in 0.15 mu m CIS process. The sensor can operate in compressed sensing mode with compression ratio 1/4, 1/8, or 1/16 at 480, 960, or 1920 fps, respectively, or in normal capture mode with no compressed sensing at a maximum frame rate of 120 fps. Measurement results demonstrate capture in compressed sensing mode at roughly the same readout noise of 351 mu V-rms and power consumption of 96.2 mW of normal capture at 120 fps. This performance is achieved with only 1.8% die area overhead. image reconstruction shows modest quality loss relative to normal capture and significantly higher image quality than downsampling.

关键词： Sigma Delta ADC cmos image sensor compressed/compressive sensing

来源：评论

学校读者我要写书评

暂无评论

A cmos image sensor with analog two-dimensional DCT-based compression circuits for one-chip cameras

引用

IEEE JOURNAL OF SOLID-STATE CIRCUITS 1997年第12期32卷 2030-2041页

作者： Kawahito, S Yoshida, M Sasaki, M Umehara, K Miyazaki, D Tadokoro, Y Murata, K Doushou, S Matsuzawa, A MATSUSHITA ELECT IND CO LTD SEMICOND RES CTRMORIGUCHIOSAKA 570JAPAN

This paper presents a cmos image sensor with on-chip compression using an analog two-dimensional discrete cosine transform (2-D DCT) processor and a variable quantization level analog-to-digital converter (ADC), The analog 2-D DCT processor is essentially suitable for the on-sensor image compression, since the analog image sensor signal can be directly processed, The small and low-power nature of the analog design allows us to achieve low-power, low-cost, one-chip digital video cameras, The 8 x 8-point analog 2-D DCT processor is designed with fully differential switched-capacitor circuits to obtain sufficient precision for video compression purposes, An imager array has a dedicated eight-channel parallel readout scheme for direct encoding with the analog 2-D DCT processor. The variable level quantization after the 2-D DCT can be performed by the ADC at the same time, A prototype cmos image sensor integrating these core circuits for compression is implemented based on triple-metal double-polysilicon 0.35-mu m cmos technology, image encoding using the implemented analog 2-D DCT processor to the image captured by the sensor is successfully performed, The maximum peak signal-to-noise ratio (PSNR) is 36.7 dB.

关键词： A/D conversion analog LSI cmos image sensor discrete cosine transform low power design mobile computing video compression

来源：评论

学校读者我要写书评

暂无评论

cmos image sensor with pseudorandom pixel Placement

引用

IEICE ELECTRONICS EXPRESS 2008年第10期5卷 388-393页

作者： Akita, Junichi Kanazawa Univ Dept Informat & Syst Engn Kanazawa Ishikawa 9201192 Japan

The picture element (pixel) in conventional image sensors are placed in the form of a lattice for ease of implementation. Lattice placement of pixels intrinsically has directional singularity on the clarity of image representation, and the clarity is significantly dependent on the directions of the objects in the image. For example, horizontal lines are perfectly represented, while slanted lines have jagged edges. In this paper, we describe the cmos image sensor with the pseudorandom pixel placement that solves the problem of the directional singularity on the clarity of image representation, as well as its evaluation in terms of the clarity of image representation for slant lines.

关键词： cmos image sensor jaggy pixel placement directional singularity image clarity

来源：评论

学校读者我要写书评

暂无评论

cmos image sensor Based Physical Unclonable Function for Coherent sensor-Level Authentication

引用

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS 2015年第11期62卷 2629-2640页

作者： Cao, Yuan Zhang, Le Zalivaka, Siarhei S. Chang, Chip-Hong Chen, Shoushun Nanyang Technol Univ Sch Elect & Elect Engn Singapore 639798 Singapore

In the applications of biometric authentication and video surveillance, the image sensor is expected to provide certain degree of trust and resiliency. This paper presents a new low-cost cmos image sensor based physical unclonable function (PUF) targeting a variety of security, privacy and trusted protocols that involves image sensor as a trusted entity. The proposed PUF exploits the intrinsic imperfection during the image sensor manufacturing process to generate unique and reliable digital signatures. The proposed differential readout stabilizes the response bits extracted from the random fixed pattern noises of selected pixel pairs determined by the applied challenge against supply voltage and temperature variations. The threshold of difference can be tightened to winnow out more unstable response bits from the challenge-response space offered by modern image sensors to enhance the reliability under harsher operating conditions and loosened to improve its resiliency against masquerade attacks in routine operating environment. The proposed design can be classified as a weak PUF which is resilient to modeling attacks, with direct access to its challenge-response pair restricted by the linear feedback shift register. Our experiments on the reset voltages extracted from a 64 x 64 image sensor fabricated in 180 nm 3.3 V cmos technology demonstrated that robust and reliable challenge-response pairs can be generated with a uniqueness of 49.37% and a reliability of 99.80% under temperature variations of 15 similar to 115 degrees C and supply voltage variations of 3 similar to 3.6 V.

关键词： cmos image sensor device authentication physical unclonable function process variation random number generator trusted integrated circuits

来源：评论

学校读者我要写书评

暂无评论

cmos image sensor with NMOS-only global shutter and enhanced responsivity

引用

IEEE TRANSACTIONS ON ELECTRON DEVICES 2003年第1期50卷 57-62页

作者： Wäny, M Israel, GP Photonfocus AG Lachen SZ Sweden

Most cmos image sensors today use the rolling shutter approach to control the integration time. This pixel architecture is advantageous where minimal pixel size is required to increase resolution or reduce over all chip size. For imaging of a fast moving object or when used with pulsed illumination, the rolling shutter approach is not suitable since it leads to severe distortion (see Fig.1). Therefore, these applications require image sensors with a global shutter pixel architecture, which incorporates a sample-and-hold element in each pixel. Due to the optical exposure of the in-pixel storage element, shutter leakage is critical. First approaches which use separate wells in the pixel to isolate the storage node from the photodiode showed good shutter efficiency, but are bulky and led to large pixels with poor fill factor and bad responsivity. This paper presents an NMOS-only pixel with a global shutter and subthreshold operation of the NMOS sample-and-hold transistor to increase optical responsivity by a factor of five to 9 nuV/photon, including fill factor.

关键词： charge injection cmos image sensor global shutter high-responsivity imaging industrial vision subthreshold

来源：评论

学校读者我要写书评

暂无评论

A cmos image sensor module applied for a digital still camera utilizing the TAB on glass (TOG) bonding method

引用

IEEE TRANSACTIONS ON ADVANCED PACKAGING 1999年第2期22卷 160-165页

作者： Segawa, M Ono, M Musha, S Kishimoto, Y Ohashi, A Toshiba Corp Yokohama Kanagawa 235 Japan Toshiba Chem Corp Chem Mat Tech Dept Kawasaki Kanagawa 2100865 Japan Toshiba Corp Fukaya Works Fukaya Saitama Japan

The world's smallest (105 x 55 x 20 mm) and lightest (130 g) digital still camera has been developed, in which a 330 k pixel complementary metal-oxide-semiconductor (cmos) image sensor chip is used as an image sensor. The authors have developed a new thinner and smaller image sensor module, called tape automated bonding (TAB) on glass (TOG) module, using the anisotropic conductive paste (ACP) interconnection method. The TOG production process was established by obtaining optimum bonding conditions For both optical glass bonding and cmos chip bonding to the TAB tape. The bundling conditions including sufficient bonding margins, were mainly studied. The TOG module obtained goad imaging properties. It also has a high reliability such as thermal cycle test (-40 to +110C degrees/30 min, 2000 cycles) and the high temperature storage test (60 degrees C, 90% RH, 3000 h), The stable production process was confirmed by fabricating automatic bonding machine.

关键词： anisotropic conductive paste cmos image sensor digital still camera flip-chip bonding TAB tape

来源：评论

学校读者我要写书评

暂无评论

cmos image sensor for Lateral Flow Immunoassay Readers

引用

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS 2018年第10期65卷 1405-1409页

作者： Pilavaki, Evdokia Valente, Virgilio Demosthenous, Andreas UCL Dept Elect & Elect Engn London WC1E 7JE England Delft Univ Technol Dept Microelect NL-2628 CD Delft Netherlands

Point-of-care (POC) systems for the detection of infectious diseases are in great demand especially in developing countries. Lateral flow immunoassays are considered ideal biosensors for POC diagnostics due to their numerous advantages. However, to quantify their results a low power, robust electronic reader is needed. A low power cmos image sensor is presented that can be used in quantitative lateral flow immunoassay readers. It uses a single low power processing capacitive transimpedance amplifier architecture which includes noise cancellation. A chip containing 4 x 64 pixels was fabricated in cmos 0.35-mu m technology. With uniform illumination at 525 nm and 67 frames/s the chip has 1.9 mVrms total output referred noise and a total power consumption of 21 mu W. In tests with lateral flow immunoassays the chip detected concentrations of influenza A nucleoprotein from 0.5 ng/mL to 200 ng/mL.

关键词： cmos image sensor capacitive transimpedance amplifier lateral flow immunoassays point-of-care

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：