检索结果-内蒙古大学图书馆

compact models for Simulation of On-Chip ESD Protection Networks

IEEE TRANSACTIONS ON ELECTRON DEVICES 2024年第1期71卷 151-166页

作者： Rosenbaum, Elyse Huang, Shudong Drallmeier, Matthew Zhou, Yujie Univ Illinois Dept Elect & Comp Engn Urbana IL 61801 USA

Technology scaling and increased data rates make it near impossible to achieve historic levels of electrostatic discharge (ESD) robustness. This heightens the need for pre-Si verification that a design's ESD level is above a critical value, below which the yield loss and the number of field returns are expected to be high. Transient simulation plays a role in ESD design verification and requires the availability of accurate compact models of the various semiconductor devices, which lie along the discharge path. The compact models included in a foundry process design kit (PDK) are not accurate at ESD current levels. This article describes compact models that have been developed in the ESD device research community. It reviews the measurements used to characterize ESD protection devices and acquire data for model parameter extraction. It is concluded that obtaining accurate measurement data is challenging and this impedes the widescale adoption of ESD compact models.

关键词： Charged device model (CDM) compact models electrostatic discharge (ESD) protection silicon-controlled rectifier (SCR)

来源：评论

学校读者我要写书评

暂无评论

Machine Learning-Driven Extraction of Hybrid compact models Integrating Neural Networks and Berkeley Short-Channel Insulated-Gate Field-Effect Transistor Model-Common Multigate for Multidevice Applications

ADVANCED INTELLIGENT SYSTEMS

引用

ADVANCED INTELLIGENT SYSTEMS 2025年第5期7卷

作者： Eom, Seungjoon Lee, Seunghwan Yun, Hyeok Cho, Kyeongrae Kim, Soomin Baek, Rockhyun Pohang Univ Sci & Technol Dept Elect Engn Pohang 37673 South Korea

Conventional techniques for extracting physics-based model parameters are inherently slow processes and often yield less accurate model parameters because of the inflexibility of physical equations. This study presents a novel machine learning-based method to accelerate and enhance the accuracy of compact model generation for multiple devices simultaneously. By integrating a Berkeley short-channel Insulated-Gate Field-Effect Transistor (IGFET) model-common multigate (BSIM) model with an error-correction neural network, the proposed approach refines predictions for critical electrical behaviors such as drain current and gate capacitance. Extraction networks dynamically optimize parameter sets for both models, eliminating manual tuning and reducing the need for separate training for each device. The method was validated using TCAD-simulated 3 nm nanosheet field-effect transistors devices, achieving a mean absolute percentage error of 1.8% for drain current, 2.8% for transconductance, 8.5% for output conductance, and 0.4% for capacitances. Compared with the BSIM model alone, error reductions of 75, 70, 39, 85, and 81%, respectively, were achieved. This approach showed significant error reductions compared to the BSIM model alone and demonstrated robust performance across devices with variations, proving its effectiveness for large-scale applications.

关键词： compact models hypernetworks machine learning nanosheet field-effect transistors variabilities

来源：评论

学校读者我要写书评

暂无评论

Machine learning-based acceleration of Genetic Algorithms for Parameter Extraction of highly dimensional MOSFET compact models 28

Machine learning-based acceleration of Genetic Algorithms fo...

引用

28th IEEE International Conference on Electronics, Circuits, and Systems (IEEE ICECS)

作者： Alia, Gazmend Buzo, Andi Maier-Flaig, Hannes Pieper, Klaus-Willi Maurer, Linus Pelz, Georg Infineon Technol AG Munich Germany Bundeswehr Univ Munich Munich Germany

ISBN: (纸本)9781728182810

The need for more accurate simulations has pushed scientists and engineers to design better, more accurate and more complex MOSFET compact models. This has been supported by the big improvements in computational power and speed in the last decades. The number of parameters of the compact models has increased to hundreds and thousands and it is far beyond what the human mind can handle. As a results, the calibration of the models to represent the real characteristics of the device, also known as parameter extraction, is a complex and time consuming task. To solve this problem, many automatic techniques have been tried and the most promising ones are based on genetic algorithms. Genetic algorithms on the other side, although appropriate for such tasks, require a large number of simulations to converge to a good solution. In this paper we propose a methodology to drastically reduce the number of simulations by introducing a combination of genetic algorithms and surrogate models as classifiers. The state of the art about the combination of surrogate models and genetic algorithms is exclusively focused on how to use surrogate models to substitute the expensive simulations. Our novel approach consists on adding a classifier layer between the genetic algorithm and the simulations, which filters out a significant number of non-promising parameter sets that do not need to be simulated at all. In this research, differential evolution was used as the genetic algorithm and after a careful evaluation of several classifier types, the decision tree classifier was selected as the best performing one. The method was tested with two complex real life problems, BSIM4 and HiSIM-HV MOSFET compact models, and the results show that up to 70% of the simulations could be eliminated without disturbing the convergence of the algorithm and maintaining the accuracy of the solution.

关键词： compact models decision tree BSIM HiSIM-HV genetic algorithms differential evolution parameter extraction

来源：评论

学校读者我要写书评

暂无评论

Flicker Noise Formulations in compact models

引用

IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS 2020年第10期39卷 2812-2821页

作者： Coram, Geoffrey J. McAndrew, Colin C. Gullapalli, Kiran K. Kundert, Kenneth S. Analog Devices Inc Engn Enablement Wilmington MA 01887 USA NXP Semicond Modeling Lib Chandler AZ 85224 USA NXP Semicond Characterizat Lib Chandler AZ 85224 USA NXP Semicond SPICE Lib Chandler AZ 85224 USA NXP Semicond Design Enablement Analog & Mixed Signal Austin TX 78735 USA Designers Guide Consulting San Jose CA 95125 USA

This article shows how to properly define modulated flicker noise in Verilog-A compact models, and how a simulator should handle flicker noise for periodic and transient analyses. By considering flicker noise in a simple linear resistor driven by a sinusoidal source, we demonstrate that the absolute value formulation used in most existing Verilog-A flicker noise models is incorrect when the bias applied to the resistor changes sign. Our new method for definition overcomes this problem, in the resistor as well as more sophisticated devices. The generalization of our approach should be adopted for flicker noise, replacing the formulation in existing Verilog-A device models, and it should be used in all new models. Since Verilog-A is the de facto standard language for compact modeling, it is critical that model developers use the correct formulation.

关键词： Integrated circuit modeling Hardware design languages Resistors Computational modeling Analytical models Mathematical model Simulation compact models flicker noise modulated stationary noise model Verilog-A

来源：评论

学校读者我要写书评

暂无评论

Modeling and Parameter Extraction of OFET compact models Using Metaheuristics-Based Approach

引用

IEEE ACCESS 2019年 7卷 180438-180450页

作者： Akkan, Nihat Altun, Mustafa Sedef, Herman Yildiz Tech Univ Elect & Commun Engn Dept TR-34220 Istanbul Turkey Istanbul Tech Univ Elect & Commun Engn Dept TR-34469 Istanbul Turkey

Research on the fabrication of organic field effect transistors (OFETs) has been dramatically increased in the last decade, considering their lightweight and flexible structure as well as their practical and low-cost production. In the next step of fabrication, building compact models and developing parameter extraction methods have critical importance in designing electronic circuits using fabricated OFETs. In this paper, we propose a parameter extraction approach which benefits from the power of metaheuristics. Although direct extraction tools offer analytical solutions in successive steps to extract model parameters, metaheuristics-based global optimization methods can find all parameters at once by exploring a wide range of parameters. Direct extraction tools are cumbersome and need human expertise. On the other hand, global optimization methods are very flexible, adaptive and can be automated as parameter extraction tools of any compact model. In this study, we introduce three different global optimization algorithms, namely, a genetic algorithm (GA), a hybrid artificial bee colony (h-ABC) algorithm, and bacterial foraging optimization (BFO) algorithm, for the parameter extraction. To the best of our knowledge, h-ABC and BFO algorithms have been used for the first time in extracting parameters of OFET compact models. We use two OFET compact models developed by Estrada et al. and Marinov et al. for two different datasets of OFET transistors, both having pentacene as organic semiconductor. While one of the dataset of transistor (T1) is available in literature, the dataset of the other transistor fabricated in our laboratory (T2) is generated as a new dataset. In order to tune control parameters of the developed algorithms, Taguchi's orthogonal experimental design (OED) method is used. Experimental results show that the proposed metaheuristics-based approach can extract model parameters successfully and can perform better than direct extraction methods. The studie

关键词： compact models organic field effect transistor (ofet) parameter extraction artificial bee colony algorithm bacterial foraging algorithm genetic algorithm Taguchi method

来源：评论

学校读者我要写书评

暂无评论

Physics-based compact models: An Emerging Trend in Simulation-based GaN HEMT Power Amplifier Design 20

Physics-based Compact Models: An Emerging Trend in Simulatio...

引用

IEEE 20th Wireless and Microwave Technology Conference (WAMICON)

作者： Khandelwal, Sourabh Univ S Florida Dept Elect Engn Tampa FL 33620 USA

ISBN: (纸本)9781538695975

An important and impactful trend in GaN HEMT transistor model representation is the emergence of physics-based compact models. Developed from device physics, these models offer: high scalability, close connection to technology for deign-technology co-optimization, ability to model statistical manufacturing variations, and ability to model long-term device degradation effects. The novel features of these models will be compared with the traditional empirical modeling approaches. Results achieved so far with these models will be discussed. As the power amplifier design requirements become increasingly stringent, physics-based compact models can become enablers of next generation simulation-based power amplifier designs.

关键词： MMIC power amplifiers Gallium Nitride compact models

来源：评论

学校读者我要写书评

暂无评论

Development, Characterization and Validation of compact models for RF Analog and Mixed Signal PDKs enabling First Pass Silicon

Development, Characterization and Validation of Compact Mode...

引用

International Conference on Computing Methodologies and Communication (ICCMC)

作者： Chakraverty, Mayank Prabhu, Krishna Arla Harisankar, P. S. GLOBALFOUNDRIES RF Analog & Mixed Signal PDK Design Enablement Gr Manyata Embassy Business Pk Bangalore 560045 Karnataka India

ISBN: (纸本)9781509048908

This paper emphasizes on the criticality of characterization and validation of compact models in RF Analog & Mixed Signal PDK development to ensure first pass silicon. The importance of predictive modeling comprising TCAD analysis, process and device simulations is emphasized in the context of emerging high frequency, technological advancements. An exhaustive study of the intricacies involved in the model development process, comprising model characterization, model qualification and model release flow to aid successful silicon implementation for RF applications has been presented in this paper. compact models for active devices like NPNs and MOSFETs that are part of RF AMS PDK library are dealt in detail while touching passive device models at a high level. The importance of quality RF device models in the design environment has been discussed. The role of quality models in the RF design space to aid the designer to realize first pass silicon, contributing to the long term success of design houses, has been presented towards the end of the paper.

关键词： PDK RF IC MMIC compact models TCAD characterization model validation

来源：评论

学校读者我要写书评

暂无评论

compact MILP models for the Discrete Cost Multicommodity Network Design Problem

Compact MILP models for the Discrete Cost Multicommodity Net...

引用

International Conference on Engineering and MIS (ICEMIS)

作者： Layeb, Safa Bhar Heni, Riheb Balma, Ali Univ Tunis El Manar Natl Engn Sch Tunis UR OASIS Optimizat & Anal Serv & Ind Syst Tunis Tunisia Univ Tunis Tunis Business Sch UR BADEM Business Analyt & Decis Making Tunis Tunisia

ISBN: (纸本)9781509067787

We investigate a challenging NP-hard variant of Network Design Problems called the Discrete Cost Multicommodity Network Design Problem (DCMNDP), which arises in a wide range of real-life situations such as telecommunication settings, multicast routing and aircraft assignment. In graph theory terms, the DCMNDP requires designing a minimum cost network by installing at most one facility on each edge while the installed capacities permit the routing of a prescribed multi-commodity flow value. We focus on investigating polynomial-sized Mixed Integer Linear Programming (MILP) formulations. Besides a basic arc-flow formulation, two new overflow and flow aggregation based formulations are proposed. To improve the performance of the proposed formulations, valid cuts/constraints are appended. Preliminary computational results are conducted on real-world networks and randomly generated instances using a general-purpose MIP solver.

关键词： Network Design Problems Mixed Integer Linear Programming Formulations compact models Valid Cuts Solver

来源：评论

学校读者我要写书评

暂无评论

compact models of Negative-Capacitance FinFETs: lumped and distributed charge models

Compact Models of Negative-Capacitance FinFETs: lumped and d...

引用

IEEE International Electron Devices Meeting

作者： Juan P. Duarte Sourabh Khandelwal Asif I. Khan Angada Sachid Yen-Kai Lin Huan-Lin Chang Sayeef Salahuddin Chenming Hu Dept. of Electrical Engineering and Computer Sciences University of California Berkeley

ISBN: (纸本)9781509039036

This work presents insights into the device physics and behaviors of ferroelectric based negative capacitance FinFETs (NC-FinFETs) by proposing lumped and distributed compact models for its simulation. NC-FinFET may have a floating metal between ferroelectric (FE) and the dielectric layers and the lumped charge model represents such a device. For a NC-FinFET without a floating metal, the distributed charge model should be used and at each point in the channel the ferroelectric layer will impact the local channel charge. This distributed effect has important implications on device characteristics as shown in this paper. The proposed compact models have been implemented in circuit simulators for exploring circuits based on NC-FinFET technology.

关键词： compact models Negative-Capacitance FinFETs

来源：评论

学校读者我要写书评

暂无评论

Well-Balanced Ambipolar Charge Transport of Diketopyrrolepyrrole-Based Copolymers: Organic Field-Effect Transistors and High-Voltage Logic Applications

引用

MACROMOLECULAR RAPID COMMUNICATIONS 2024年第1期45卷 2300271-2300271页

作者： Xuyao, Song Kim, Sang Beom Jung, Hanggyo Kim, Jaekyum Mo, Jaewan Jeong, Yong Jin Jang, Jaeyoung An, Tae Kyu Kim, Yun-Hi Jeon, Jongwook Gyeongsang Natl Univ Dept Chem Jinju 52828 South Korea Hanyang Univ Dept Energy Engn Seoul 04763 South Korea Sungkyunkwan Univ Sch Elect & Elect Engn Suwon 16419 South Korea Korea Natl Univ Transportat Dept IT Energy Convergence BK21 FOUR 50 Daehak Ro Chungju 27469 South Korea Korea Natl Univ Transportat Dept Mat Sci & Engn 50 Daehak Ro Chungju 27469 South Korea Korea Natl Univ Transportat Dept Polymer Sci & Engn 50 Daehak Ro Chungju 27469 South Korea

A poly (3,6-bis(thiophen-2-yl)-2,5-bis(2-decyltetradecyl)-2,5-dihydropyrrolo[3,4-c]pyrrole-1,4-dione-co-(2,3-bis(phenyl)acrylonitrile)) (PDPADPP) copolymer, composed of diketopyrrolopyrrole (DPP) and a cyano (nitrile) group with a vinylene spacer linking two benzene rings, is synthesized via a palladium-catalyzed Suzuki coupling reaction. The electrical performance of PDPADPP in organic field-effect transistors (OFETs) and circuits is investigated. The OFETs based on PDPADPP exhibit typical ambipolar transport characteristics, with the as-cast OFETs demonstrating low field-effect hole and electron mobility values of 0.016 and 0.004 cm(2) V-1 s(-1), respectively. However, after thermal annealing at 240 & DEG;C, the OFETs exhibit improved transport characteristics with highly balanced ambipolar transport, showing average hole and electron mobility values of 0.065 and 0.116 cm(2) V-1 s(-1), respectively. To verify the application of the PDPADPP OFETs in high-voltage logic circuits, compact modeling using the industry-standard small-signal Berkeley short-channel IGFET model (BSIM) is performed, and the logic application characteristics are evaluated. The circuit simulation results demonstrate excellent logic application performance of the PDPADPP-based ambipolar transistor and illustrate that the device annealed at 240 & DEG;C exhibits ideal circuit characteristics.

关键词： ambipolar logic circuits compact models diketopyrrolopyrrole (DPP) organic field-effect transistors (OFETs)

来源：评论

学校读者我要写书评

暂无评论

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案：

请选择收藏分类：

通借通还

建议与咨询 留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

时间限定

文献类型

馆藏选择

核心期刊

语言

文献类型

帮助

文字说明：

检索规则说明：

检索范例：

分类表

所选分类

限定检索结果

文献类型

馆藏范围

日期分布

学科分类号

主题

机构

作者

语言

请选择保存的检索档案： 新增检索档案 确定 取消

请选择收藏分类： 新增自定义分类 确定 取消

通借通还

建议与咨询留下您的常用邮箱和电话号码，以便我们向您反馈解决方案和替代方法

请选择保存的检索档案：

请选择收藏分类：