Coarse-grained reconfigurable architectures can enhance the performance of critical loops and computation-intensivefunctions. Such architectures need efficient compilation techniques to map algorithms onto customized...
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Coarse-grained reconfigurable architectures can enhance the performance of critical loops and computation-intensivefunctions. Such architectures need efficient compilation techniques to map algorithms onto customized architectural configurations. A new compilation approach uses a generic reconfigurable architecture to tackle the memory bottleneck that typically limits the performance of many applications.
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