Simulation and physical implementation are both valuable tools in evaluating ad hoc network routing protocols, but neither alone is sufficient. In this paper, we present the design and performance of PRAN, a new syste...
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Simulation and physical implementation are both valuable tools in evaluating ad hoc network routing protocols, but neither alone is sufficient. In this paper, we present the design and performance of PRAN, a new system for the physical implementation of ad hoc network routing protocols that unifies these two types of evaluation methodologies. PRAN ( Physical Realization of Ad hoc Networks) allows existing simulation models of ad hoc network routing protocols to be used - without modification - to create a physical implementation of the same protocol. We have evaluated the simplicity and portability of our approach across multiple protocols and multiple operating systems through example implementations in PRAN of the DSR and AODV routing protocols in FreeBSD and Linux using the standard existing, unmodified ns-2 simulation model of each. We illustrate the ability of the resulting protocol implementations to handle real, demanding applications by describing a demonstration with this DSR implementation transmitting real-time video streams over a multihop mobile ad hoc network;the demonstration features mobile robots being remotely operated based on the real-time video stream transmitted from the robot over the network. We also present a detailed performance evaluation of PRAN to show the feasibility of our architecture.
THE AUTHORS ADOPTED AN AGILE HARDWARE DEVELOPMENT METHODOLOGY FOR 11 RISC-V MICROPROCESSOR TAPE-OUTS ON 28-NM AND 45-NM CMOS PROCESSES. THIS ENABLED SMALL TEAMS TO QUICKLY BUILD ENERGY-EFFICIENT, COST-EFFECTIVE, AND C...
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THE AUTHORS ADOPTED AN AGILE HARDWARE DEVELOPMENT METHODOLOGY FOR 11 RISC-V MICROPROCESSOR TAPE-OUTS ON 28-NM AND 45-NM CMOS PROCESSES. THIS ENABLED SMALL TEAMS TO QUICKLY BUILD ENERGY-EFFICIENT, COST-EFFECTIVE, AND COMPETITIVE HIGH-PERFORMANCE MICROPROCESSORS. THE AUTHORS PRESENT A CASE STUDY OF ONE PROTOTYPE FEATURING A RISC-V VECTOR MICROPROCESSOR INTEGRATED WITH SWITCHED-CAPACITOR DC-DC CONVERTERS AND AN ADAPTIVE CLOCK GENERATOR IN A 28-NM, FULLY DEPLETED SILICON-ON-INSULATOR PROCESS.
In the Mid-1960s, the Laboratory at Los Alamos, New Mexico, a center of scientific computing since the Manhattan Project, embarked on a search for a new supercomputer intended to fulfill the growing need for computing...
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In the Mid-1960s, the Laboratory at Los Alamos, New Mexico, a center of scientific computing since the Manhattan Project, embarked on a search for a new supercomputer intended to fulfill the growing need for computing power in nuclear weapons development. Although depicted at Los Alamos in later years as a smooth transition between vendors, the selection process was a contentious negotiation among computing experts and users over their differing visions of computing and its place at Los Alamos. This article argues that changing technical and political demands on weapons design and Los Alamos's place in the rivalry between IBM and Control Data Corporation further complicated the selection process and challenged the traditional control and direction of Los Alamos's computing strategy. The result was the formation of a new computing division and a reframing of the debate over the long-standing management and purpose of computing at Los Alamos.
When high throughput and utilization of fabric at close-to-the-link capacity are most needed in a cluster, Ethernet is a potential candidate, rivaling traditional HPC interconnects. The distributed real-time data acqu...
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When high throughput and utilization of fabric at close-to-the-link capacity are most needed in a cluster, Ethernet is a potential candidate, rivaling traditional HPC interconnects. The distributed real-time data acquisition at particle physics experiments presents an interesting use case. This article evaluates possible Ethernet-based solutions for aggregating data from hundreds of data sources at a throughput of dozens of Tb/s. This leads us to many-to-one data exchanges where we strive for a cost-optimized setup sustaining more than 80 % of the theoretical link-load. We investigate possible Ethernet-based traffic patterns to handle data acquisition on large multi-source apparatuses. Different numbers of producers and receivers and different link speeds are allowed in a large-scale network. Performance tests were conducted using customized benchmarks and evaluation test benches. The article presents tested scenarios and problems encountered in practice. We describe how our findings influenced the design of a large production system at CERN. We also present relevant general conclusions for a broader range of applications of Ethernet in HPC.
Large-scale datacenters are facing increasing pressure of capping their carbon emission and power cost. Many leading-edge studies have started to explore server clusters running on multiple power sources. Existing app...
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Large-scale datacenters are facing increasing pressure of capping their carbon emission and power cost. Many leading-edge studies have started to explore server clusters running on multiple power sources. Existing approaches do not sufficiently consider the fine-grained power delivery to satisfy diverse requirements in datacenter, especially in the multi-tenant/colocation datacenter, which may yield low energy utilization. To address the emerging trend and new requirements, this article proposes a novel Datacenter inner Power Switch Network (DiPSN) to improve datacenter power efficiency and user satisfaction. DiPSN is a reconfigurable and easy-to-scale-out power architecture, which enables datacenter to distribute various power sources in a fine-grained manner. Moreover, a tailored machine learning based power source management framework is proposed for DiPSN to dynamically optimize user customized performance metrics and maximize datacenter revenue. Compared with conventional single-switch power distribution system, our DiPSN can be configured to improve solar energy utilization by 39.6 percent, reduce utility power cost by 11.1 percent and improve workload performance by 33.8 percent. Meanwhile, our design can extend battery lifetime by 9.3 percent. This work could provide valuable guidelines for designing heterogeneous power distribution architecture and management methodology in datacenters for improving user-customizable efficiency, sustainability and economy.
Programmable pocket calculators of the mid-1970s opened up a new segment of the personal computing devices market. Calculator users established clubs, magazines, and conferences, and their interaction with manufacture...
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Programmable pocket calculators of the mid-1970s opened up a new segment of the personal computing devices market. Calculator users established clubs, magazines, and conferences, and their interaction with manufacturers shaped the products' further development. This article explores one of the understudied roots of personal computing, through the evolution of the user communities formed around the TI-59 and HP-41C calculators.
Vibrotactile skin-reading effectively conveys rich information via vibrotactile patterns, which has gained attention due to recent advancements. However, training to recognize and associate vibrotactile patterns with ...
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Vibrotactile skin-reading effectively conveys rich information via vibrotactile patterns, which has gained attention due to recent advancements. However, training to recognize and associate vibrotactile patterns with their meaning is time-consuming and tedious. The conventional training methods use repetitive exposure of the vibrotactile stimuli along with visual and auditory cues of the corresponding symbol. This work proposes a novel visual-based training method to teach users the associations between semantic information and vibrotactile patterns. Our proposed visual explanation training is compared with the conventional training method in a study with 18 participants. Results show that participants achieve a better performance using the new visual explanation training when identifying single English alphabet characters. Moreover, the proposed training also incurred a significantly lower workload (NASA TLX) and was preferred by study participants. The proposed method is thus effective and offers a less stressful form of training users for skin reading.
The Warp machine is a systolic array computer of linearly connected cells, each of which is a programmable processor capable of performing 10 million floating-point operations per second (10 MFLOPS). A typical Warp ar...
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The Warp machine is a systolic array computer of linearly connected cells, each of which is a programmable processor capable of performing 10 million floating-point operations per second (10 MFLOPS). A typical Warp array includes ten cells, thus having a peak computation rate of 100 MFLOPS. The Warp array can be extended to include more cells to accommodate applications capable of using the increased computational bandwidth. Warp is integrated as an attached processor into a Unix host system. Programs for Warp are written in a high-level language supported by an optimizing compiler. The first ten-cell prototype was completed in February 1986; delivery of production machines started in April 1987. Extensive experimentation with both the prototype and production machines has demonstrated that the Warp architecture is effective in the application domain of robot navigation as well as in other fields such as signal processing, scientific computation, and computer vision research. For these applications, Warp is typically several hundred times faster than a VAX 11/780 class computer. This paper describes the architecture, implementation, and performance of the Warp machine. Each major architectural decision is discussed and evaluated with system, software, and application considerations. The programming model and tools developed for the machine are also described. The paper concludes with performance data for a large number of applications.
Part 1 of this study involved development and implementation of a prototype of Interactive Foodservice Decision Assist Methods (IFDAM) software. A 1-day menu from the Health Center of Methodist Health Services, Inc., ...
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Part 1 of this study involved development and implementation of a prototype of Interactive Foodservice Decision Assist Methods (IFDAM) software. A 1-day menu from the Health Center of Methodist Health Services, Inc., which included 161 menu items and 181 ingredients, composed the data base. The prototype was used to test transfer procedures from the mainframe computer at the university to the one at the hospital and to test the program and train users. Three supporting documents were written. The Procedure Manual described methodology for data collection and use of IFDAM at the Health Center. The Data-Entry Manual explained the use of the microcomputer for entering information into IFDAM. The User Manual illustrated the command structure of IFDAM. Part 2 of the study included the addition of data from five cost centers, which were serviced from the central production facility of the Health Center. Six-week-cycle menus and all ingredient files in the food service were incorporated into the data base. The data totaled 998 menu items and 660 ingredients. Time spent by the project dietitian on development of data bases and support manuals, completion of data forms, data entry and transfer, conferences, and training totaled 362.10 hours and 898.75 hours in Parts 1 and 2, respectively. The project required 30 months to complete. Problems classified as equipment, program, or personnel, delayed implementation. J Am Diet Assoc 88:200, 1988.
Power mismatching between supply and demand has emerged as a top issue in modern datacenters that are under-provisioned or powered by intermittent power supplies. Recent proposals are primarily limited to leveraging u...
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Power mismatching between supply and demand has emerged as a top issue in modern datacenters that are under-provisioned or powered by intermittent power supplies. Recent proposals are primarily limited to leveraging uninterruptible power supplies (UPS) to handle power mismatching, and therefore lack the capability of efficiently handling the irregular peak power mismatches. In this paper we propose hPower, the first heterogeneous energy buffering strategy that incorporates supercapacitors into existing datacenters to handle power mismatch. Our technique exploits power supply diversity and smart load assignment to provide efficiency-aware and emergency-aware power mismatch management. We show that hPower could improve energy efficiency by 30 percent, extend UPS lifetime by 4.3 x, and reduce system downtime by 36 percent. It allows datacenters to adapt themselves to various power supply anomalies, thereby improving operational efficiency and resiliency.
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