Following is a continuation of the list of titles and authors. Recovery Strategies in the No. 2 Electronic Switching System. By P. J. Kennedy and T. M. Quinn. Design of Asynchronous Sequential Machines for Fault Detec...
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Following is a continuation of the list of titles and authors. Recovery Strategies in the No. 2 Electronic Switching System. By P. J. Kennedy and T. M. Quinn. Design of Asynchronous Sequential Machines for Fault Detection. By D. H. Sawin, III, G. K. Maki, and S. R. Groenig. Fault-Tolerant Asynchronous Sequential Machine. By W. W. Patterson and G. A. Metze. Iterative Cell Switch Design for Hybrid Redundancy. By D. P. Siewiorek and E. J. McCluskey. Figure of Merit for Fault-Tolerant Space computers. By H. Hecht. Modeling of a Bubble Memory Organization with Self-Checking Translators to Achieve High Reliability. By W. G. Bouricius, W. C. Carter, E. P. Hsieh, D. C. Jessep, and A. B. Wadia.
By analyzing the data dependency graph of a program it is possible to determine the potential for program speedups by simultaneous execution of logically inddpendent operations. When concurrent execution of instructio...
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By analyzing the data dependency graph of a program it is possible to determine the potential for program speedups by simultaneous execution of logically inddpendent operations. When concurrent execution of instructions in existing programs on a given machine is attempted, efficient detection of data independence during execution is a central difficulty. Simulation, using actual program traces, has been used to evaluate the effectiveness of several approaches to detecting the presence of logically independent operations as a function of the number of processing elements. The results indicate that simple conflict detection algorithms perform about as well as more complex detection algorithms if the number of processing elements is six or less.
Efficient algorithms for asynchronous multiprocessor systems must achieve a balance between low process communication and high adaptability to variations in process speed. Algorithms which employ problem decomposition...
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Efficient algorithms for asynchronous multiprocessor systems must achieve a balance between low process communication and high adaptability to variations in process speed. Algorithms which employ problem decomposition can be classified as static and dynamic. Static and dynamic algorithms are particularly suited for low process communication and high adaptability, respectively. In order to find the ″best″ method, something about mean execution times must be known. Techniques for the analysis of the mean execution time are developed for each type of algorithm, including applications of order statistics and queueing theory. These techniques are applied in detail to (1) static generalizations of quicksort, (2) static generalizations of merge sort, and (3) a dynamic generalization of quicksort.
This article presents the sources and types of error possible in a data entry system, the possible methods of detection and procedures for correction. A quantitative method of evaluating the cost of errors in determin...
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This article presents the sources and types of error possible in a data entry system, the possible methods of detection and procedures for correction. A quantitative method of evaluating the cost of errors in determining the extent of error checking needed in any system is indicated. With intelligent analysis of possible error situations and their costs, the user can set acceptable error thresholds and meet the objective of selective data integrity at an optimum overall cost.
Testing new or changed Initial Program Load (IPL) text previously required using an Operating System (OS) Utility Program to place the assembled object deck for IPL on a disk pack, as part of the Utility Program analy...
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Testing new or changed Initial Program Load (IPL) text previously required using an Operating System (OS) Utility Program to place the assembled object deck for IPL on a disk pack, as part of the Utility Program analyze function. Then track 0 of this analyzed pack had to be copied by the utility dump function to an OS SYSRES pack. A quick bypass to this lengthy procedure is provided by loading an IPL object deck directly into core and passing control to it.
The Ada programming language is an excellent vehicle for teaching concurrent programming because support for concurrency has been designed into the language. The paper shows how primitives from other concurrent progra...
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The Ada programming language is an excellent vehicle for teaching concurrent programming because support for concurrency has been designed into the language. The paper shows how primitives from other concurrent programming languages (occam, Linda, Joyce) can be simulated within Ada. This enables students to study other constructs without the overhead of learning a new language and programming environment. The simulations use inheritance which was introduced into the new Ada 95 standard. They can also be used as examples of inheritance when teaching object-oriented programming.
This report presents a programmer's ″toolbox″ - an integrated set of software programs which facilitate various phases of microcomputersystems development and maintenance. The most important tools are the progr...
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This report presents a programmer's ″toolbox″ - an integrated set of software programs which facilitate various phases of microcomputersystems development and maintenance. The most important tools are the programming languages since they influence the overall software design and determine the effectiveness of the implementation. PLZ/SYS is a high-level language similar to Pascal, but designed specifically for efficient microcomputer systems programming tasks. PLZ/ASM is a structured assembly language with many of the features of PLZ/SYS, but based on machine-level primitives to allow complete access to a particular micro-processor architecture. The toolbox also contains a powerful macro processor program which is designed to be primarily a language enhancement tool, but can also be used as a stand-alone, general-purpose text manipulator or command interpreter.
An odd-even transposition sort is applied to a six-rung bubble ladder, where each rung holds a single (equal-length) record. In between rungs, there exist the individually controllable mode control switches. The bubbl...
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An odd-even transposition sort is applied to a six-rung bubble ladder, where each rung holds a single (equal-length) record. In between rungs, there exist the individually controllable mode control switches. The bubble ladder structure has the capability of simultaneous interchange of neighboring records, by setting the mode control switches to crossover mode. It is shown that, as a result, an N-record sequence can be sorted or permuted to any prescribed order in no more than (N plus 1)/2 cycles.
The effect of cost and performance tradeoffs on memory system hierarchies achieved by varying the total amount of memory at any two adjacent levels. An evaluation is made of the effect of cost and performance tradeoff...
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The effect of cost and performance tradeoffs on memory system hierarchies achieved by varying the total amount of memory at any two adjacent levels. An evaluation is made of the effect of cost and performance tradeoffs on memory system hierarchies achieved by varying the total amount of memory at any two adjacent levels. The hierarchy is analyzed in a multiprogramming mode by using a two server cyclic queuing model. As an example, a two level hierarchy of Bipolar, MOS and a three level hierarchy of Bipolar, MOS, and CCD for the primary memory are compared. It is shown that up to 3:1 advantage in performance can be achieved by using a three level rather than the two level hierarchy at the same total cost. The effect on the performance of the memory hierarchy due to the change in the degree of multiprogramming, the speed and cost of CCD technology used, the speed of the CPU used and the amount of CCD and MOS memory used are then evaluated.
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