This paper covers modeling computer debugging behavior, which is valuable because debugging is still a time consuming part of software development. The eventual goal of this research is to develop an on-line system th...
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ISBN:
(纸本)0898061326
This paper covers modeling computer debugging behavior, which is valuable because debugging is still a time consuming part of software development. The eventual goal of this research is to develop an on-line system that can classify debugging behavior an provide feedback. Initial stages of this research are discussed: the Identification and Conceptualization of debugging behavior. The differences observed between novice and experts while debugging three C language programs is outlined. Components of debugging behavior that can be modeled are also discussed.
Distributed programs are much more difficult to design, understand and implement than sequential or parallel ones. This is mainly due to the uncertainty created by the asynchrony inherent to distributed machines. So a...
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Distributed programs are much more difficult to design, understand and implement than sequential or parallel ones. This is mainly due to the uncertainty created by the asynchrony inherent to distributed machines. So appropriate concepts and tools have to be devised to help the programmer of distributed applications in his task. This paper is motivated by the practical problem called distributed debugging. It presents concepts and tools that help the programmer to analyze distributed executions. Two basic problems are addressed: replay of a distributed execution (how to reproduce an equivalent execution despite of asynchrony) and the detection of a stable or unstable property of a distributed execution. Concepts and tools presented are fundamental when designing an environment for distributed program development. This paper is essentially a survey presenting a state of the art in replay mechanisms and detection of unstable properties on global states of distributed executions.
For many years, the debug of embedded microprocessor and microcontroller applications has required the use of complex in-circuit emulators and logic analysers, as many early processors did not have any built in debug ...
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For many years, the debug of embedded microprocessor and microcontroller applications has required the use of complex in-circuit emulators and logic analysers, as many early processors did not have any built in debug features. However, the introduction of the Background Debug Mode replaced the use of these systems by an adding an extra monitor port to the microprocessor to allow external hardware to control the processor's execution. This experience is carried over into the definition phase of the ColdFire architecture, to incorporate features to help with the debug of end systems.
Long before the common acceptance of Ethernet switches, design firm BSW decided to use them to pump up the performance of its network. Two years later, the firm realized a switched network with enough punch to allow i...
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Long before the common acceptance of Ethernet switches, design firm BSW decided to use them to pump up the performance of its network. Two years later, the firm realized a switched network with enough punch to allow its professional staff to collaborate on CAD files. BSW, though, was not content to merely move from a shared-media net. It also added a centralized database for collaborative computing and an e-mail system at the same time, all while bringing on 150 new users. The expenses the project entailed was within the budget allocated. Net managers aiming at a smoother shift to Ethernet switching could learn from the experiences of these pioneers.
We propose a method to test totally self-checking (TSC) two-rail and parity checkers to detect multiple faults using codewords as test patterns. Earlier methods that considered multiple line stuck-at faults in TSC che...
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ISBN:
(纸本)0818655224
We propose a method to test totally self-checking (TSC) two-rail and parity checkers to detect multiple faults using codewords as test patterns. Earlier methods that considered multiple line stuck-at faults in TSC checkers proposed solutions requiring the use of non-code inputs. The disadvantage of using non-code inputs to test a checker is that if the checker is integrated into the circuit being monitored, then special additional hardware is necessary to generate such inputs. Hardware to generate non-codeword tests is not required by the proposed procedure. Even though we have shown that the method proposed is applicable to multiple line stuck-at, multiple stuck-open, gate and path delay faults, in this paper we report the details for multiple line stuck-at faults only.
This paper presents a practical paradigm, called on-the-fly replay. This paradigm consists of running a distributed program twice at the same time: an original computation is running in a regular fashion, which also i...
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This paper presents a practical paradigm, called on-the-fly replay. This paradigm consists of running a distributed program twice at the same time: an original computation is running in a regular fashion, which also includes steps of making non-deterministic choices;this execution is driving a twin execution, whose non-deterministic choices do not have to be evaluated (since they are taken from the original computation). This paradigm has several interesting uses. Among them, distributed debugging is particularly noteworthy. The integration of this paradigm into a distributed debugging facility, called EREBUS, is described. This implementation was run on a distributed memory parallel machine (Intel Hypercube iPSC2) and experimental results are described, that demonstrate the advantage of this paradigm.
debugging tools that provide insight into the timing in software as well as its logic are being developed. For instance, Microtec Research's Xpert Profiler offers a graphical display of code-execution times which ...
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debugging tools that provide insight into the timing in software as well as its logic are being developed. For instance, Microtec Research's Xpert Profiler offers a graphical display of code-execution times which tells not only how long code segments run, but also the order and flow of task execution. Wind River Systems' Wind View, the agent/analyst tool, displays what the code is doing, making clear the complex interactions between tasks and the operating system. Tricky bugs such as priority inversion become instantly recognizable, speeding software-debug efforts. Other similar tools are described.
debugging a multiprocessor system is considered to be an extremely difficult task because of the multiple concurrent threads of control that have to be dealt with. The problems involved can best be tackled by proceedi...
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debugging a multiprocessor system is considered to be an extremely difficult task because of the multiple concurrent threads of control that have to be dealt with. The problems involved can best be tackled by proceeding in a hierarchical manner. First, errors are detected and isolated by means of a high-level debugger. For this, a graphical representation of the program proves to be very useful. Then, a traditional debugger is used to locate errors exactly. This debugging cycle, however, requires reproducible execution behavior which is hampered by the nondeterminacy of these programs. Therefore, hardware assistance is sometimes needed to avoid all interference with the application. This is especially true when accurate monitoring information for system analysis is to be obtained.
A powerful debugging tool is needed for the software development on supercomputers. However, it is difficult to use the traditional debugging method due to the particular architecture of the supercomputer. A software ...
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A powerful debugging tool is needed for the software development on supercomputers. However, it is difficult to use the traditional debugging method due to the particular architecture of the supercomputer. A software debugging technique based on the debug-line was presented in this paper, which is not only creative in principle but also effective in practice.
Software debugging in hardware simulation environments is often is often inconvenient and extremely slow. The back C method described in this paper allows one to reproduce accurately the simulated code flow under a co...
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ISBN:
(纸本)0897915771
Software debugging in hardware simulation environments is often is often inconvenient and extremely slow. The back C method described in this paper allows one to reproduce accurately the simulated code flow under a conventional pure software debugging environment, while greatly decreasing the test turnaround time, thereby drastically reducing debugging time. The described method has been successfully implemented and used during a chip hardware and embedded software co-design. It can be applied to any conventional simulation environment used for co-design verification.
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