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作者： Ross, John Lee Naval Postgraduate School

学位级别：硕士

This thesis presents a design for a system initialization mechanism for a multiple processor system. The design is based upon a system of microprocessors (specifically the Intel 8086) being used with a set of application processes, as is common in many real time applications. The design is based upon the concepts ofexplicit communicating processes and explicit memory segmentation- although it does not require full hardware segmentation. With the goal o£ simplifying the system initialization function, this thesis segregates the required initialization actions into three distinct phases. The specific phase for each action' is determined by which phase provides the most supportive environment for that particular action While the initialization mechanism described in this thesis was developed for -a particular real-time application, the design concepts described are applicable to a variety of hardware and operating system configurations.

关键词： computer system initialization Bootstrap Loading Multiprocessors Microcomputers system Generation

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THE PROCESSOR IDENTITY PROBLEM

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INFORMATION PROCESSING LETTERS 1990年第2期36卷 91-94页

作者： LIPTON, RJ PARK, A UNIV CALIF DAVIS CALIF PRIMATE RES CTRDIV COMP SCIDAVISCA 95616

This paper investigates the problem of assigning unique identifiers to processors that communicate through shared memory. Solutions to fundamental multiprocessor coordination problems such as the Mutual Exclusion Problem and the Choice Coordination Problem often rely on unique identifiers. We present a probabilistic protocol that solves this Processor Identity Problem for asynchronous processors that communicate through a common shared memory. This protocol requires no central arbiter, and all processors start in exactly the same state. The use of our protocol simplifies shared memory processor design by eliminating the need to encode processor identifiers in system hardware or software structures.

关键词： computer system initialization parallel algorithms probabilistic algorithms synchronization

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