作者：
Tamminen, MarkkuHelsinki Univ of Technology
Lab of Information Processing Science Espoo Finl Helsinki Univ of Technology Lab of Information Processing Science Espoo Finl
The author studies the effect of data distribution on address computation data structures for searching, as typified by the priority queue problem. He compares several techniques showing that, in contrast to sorting, ...
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The author studies the effect of data distribution on address computation data structures for searching, as typified by the priority queue problem. He compares several techniques showing that, in contrast to sorting, neither one nor multilevel bucket methods are uniformly efficient for this task. However, an enhancement of order preserving extendible hashing is shown to behave asymptotically independently of the amount of data and its distribution. Also conclusions regarding multiattribute file structures are presented.
Recently developed block-iterative versions of some row-action algorithms for solving general systems of sparse linear equations allow parallelism in the computations when the underlying problem is appropriately decom...
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Recently developed block-iterative versions of some row-action algorithms for solving general systems of sparse linear equations allow parallelism in the computations when the underlying problem is appropriately decomposed. However, problems associated with the parallel implementation of these algorithms have to be addressed. In this paper we present an implementation on distributed memory multiprocessors of a block version of the Kaczmarz row-action method. One of the main issues related to the efficient implementation of this method on a concurrent environment is to develop suitable communication schemes in order to reduce the amount of communication needed at each iteration. We propose two data distribution strategies which lead to different computation and communication schemes. To verify and compare the effectiveness of the proposed strategies, numerical experiments have been carried out on a Symult S2010 and a Meiko Computing Surface. The performance evaluation has been done using a scaled efficiency model.
Release page is a supervisor service, which functions to make available all real and auxiliary storage wholly associated with an area of virtual address space. The virtual address space remains allocated, i. e. , the ...
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Release page is a supervisor service, which functions to make available all real and auxiliary storage wholly associated with an area of virtual address space. The virtual address space remains allocated, i. e. , the area remains addressable, but the contents of the address space are released.
A VLSI sorter of size O(n) can sort n elements in linear time when the input and output time are taken into account. If the input contains more than n elements, some preprocessing has to be performed. A VLSI partition...
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A VLSI sorter of size O(n) can sort n elements in linear time when the input and output time are taken into account. If the input contains more than n elements, some preprocessing has to be performed. A VLSI partition algorithm that provides a solution to this problem is presented. The algorithm partitions the input data into two smaller parts as the quicksort algorithm does. That is, the elements of the first part will be smaller than the elements of the second part. The partition is repeated until the parts are small enough to fit in the sorter. It is shown that the average number of times each element must go through the partitioner is O(log k) for a data file of size kn where n is the size of the sorter. In the worst case where the partitioner fails to divide the input evenly, the elements must go O(k) times through the partitioner as in the quicksort algorithm. The partitioner can also be used, with simple modifications, as a sorter, a stack, a queue, or as a priority queue. Other advantages of the VLSI algorithm are also discussed.
The technological specification language for the PP (post-processor) program processing the punched tape of the ADMAP equipment producing printed circuits is described. Technological instructions are translated by the...
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The technological specification language for the PP (post-processor) program processing the punched tape of the ADMAP equipment producing printed circuits is described. Technological instructions are translated by the translator program to tables controlling the functioning of the PP.
This is an apparatus for managing a linear list of page usage under a predetermined page replacement policy in a virtual memory system. It is especially suitable for storage management where the data base contains mil...
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This is an apparatus for managing a linear list of page usage under a predetermined page replacement policy in a virtual memory system. It is especially suitable for storage management where the data base contains millions of pages of which thousands are in active storage.
An experimental system (DSYS) to support high-level distributed computing is being developed. DSYS will run on the seven computers in the authors, laboratory: four ALTOs, two Eclipses, and a PDP/10. It will provide fa...
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An experimental system (DSYS) to support high-level distributed computing is being developed. DSYS will run on the seven computers in the authors, laboratory: four ALTOs, two Eclipses, and a PDP/10. It will provide facilities for defining and running PLITS distributed jobs (DJOBs). Progress to date and present design ideas for DSYS are described.
This algorithm provides online monitoring of user accounts and subsequent system actions based upon variance from a specified budget. It can provide end users with up-to-date account status information;it can be used ...
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This algorithm provides online monitoring of user accounts and subsequent system actions based upon variance from a specified budget. It can provide end users with up-to-date account status information;it can be used to encourage consistent system utilization overtime without imposition of rigid authorization schedules;and it offers the installation a means to enforce contracts which guarantee a minimum level of revenue. It provides the interface between the accounting administrator and the control program.
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