A hardware/software dataflow system is described that can accept a program written in a conventional programming language, compile it, link it, and then automatically partition it across any number of processors. This...
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A hardware/software dataflow system is described that can accept a program written in a conventional programming language, compile it, link it, and then automatically partition it across any number of processors. This partitioning is done without explicit programmer directives and without regard for artificial program boundaries such as subroutines or blocks. As a result, the multiprocessor nature of the system is transparent to the programmer. The system is able to identify and use program parallelism at any level, including random inter-instruction parallelism, array (vector) parallelism, and algorithmic parallelism. The system uses this parallelism to speed program execution by applying multiple processors to the problem and to mask overhead by overlapping overhead with execution.
The development of software for microcomputers for use in educational environments is discussed. The suggestions presented should assist in the appropriate selection of the software and in being aware of the care nece...
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The development of software for microcomputers for use in educational environments is discussed. The suggestions presented should assist in the appropriate selection of the software and in being aware of the care necessary in presenting the material to a student.
A multistage probabilistic decision model is formulated to determine the optimal batch size for computer jobs to be distributed to a series of time-share vendors. A recursive cost function is given for each stage in t...
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A multistage probabilistic decision model is formulated to determine the optimal batch size for computer jobs to be distributed to a series of time-share vendors. A recursive cost function is given for each stage in terms of the telecommunication cost, the actual processing cost, and a probability function giving the probability that a batch will be completed by a certain vendor. The probability function is studied from the viewpoint of a birth-death process and its estimate obtained as a function of the vendors' traffic patterns, buffer sizes and numbers of communication lines.
Universal programmingsystems are developed for more cost-effective programming of high volume devices such as application specific integrated circuits (ASIC) and field programmable gate arrays (FPGA). The cost of ASI...
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Universal programmingsystems are developed for more cost-effective programming of high volume devices such as application specific integrated circuits (ASIC) and field programmable gate arrays (FPGA). The cost of ASIC fabrication is affected by the expenditure on development, the relatively high NRE charges and the price for the individual device itself. Although an individual FPGA can be programmed in a matter of several minutes, the programming cost for multiple identical parts still represent a considerable factor. The cost for programming FPGAs is significantly high that ASIC technology is the only rational solution.
Several mechanisms, based on the use of semaphores, have been proposed to provide solutions for synchronization problems. This paper reports the results of a comparison of seven such synchronization mechanisms.
Several mechanisms, based on the use of semaphores, have been proposed to provide solutions for synchronization problems. This paper reports the results of a comparison of seven such synchronization mechanisms.
programming takes an increasing percentage of system design time. This is particularly true for single-chip, microcomputer-based systems where the hardware design may be quick and easy but software takes as long as it...
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programming takes an increasing percentage of system design time. This is particularly true for single-chip, microcomputer-based systems where the hardware design may be quick and easy but software takes as long as it ever has. Development costs can be substantially reduced by writing the application programs in a high level language rather than in the microprocessor's assembly or machine language. High level languages are either interpreted or compiled. Putting an interpreter in the onboard read only memory (ROM) of a single-chip microcomputer allows it to be programmed directly in the high level language provided. An interpreter based on the Forth language has been developed for RCA's CDP1804 microcomputer.
Virtual computersystems can improve software reliability by localizing and controlling the impact of operating system errors and by permitting large systems to be constructed from a set of independent and less comple...
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Virtual computersystems can improve software reliability by localizing and controlling the impact of operating system errors and by permitting large systems to be constructed from a set of independent and less complex modules. In this discussion, the authors used availability as an indicator of reliability; characterized the overall value of a system in terms of a utility function defined on the possible degrees of availability; demonstrated a number of conditions under which virtual computersystems would be superior to comparable multiprogrammingsystems organized in the conventional manner.
In recent years the architecture of data base systems has become better understood and more clearly defined. In the course of this development the question of optimizing these systems has become more pronounced. Never...
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In recent years the architecture of data base systems has become better understood and more clearly defined. In the course of this development the question of optimizing these systems has become more pronounced. Nevertheless, the optimization of complex program systems like data base systems remains an especially difficult area. Structuring a system by means of levels of interfaces will improve the task. The paper attempts to establish the optimization discipline which a developer, or the system as such, must follow in a multi-level data base system when a top-down approach is taken. The motions of level, multi-level system and top-down optimization are made precise. It is shown that optimization is basically achieved by repeatedly constructing equivalent programs within various levels.
The first section of this paper discusses the DAIS Executive from the Application Programmers point of view with respect to the capabilities required and the interface that is presented. The second section of this pap...
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The first section of this paper discusses the DAIS Executive from the Application Programmers point of view with respect to the capabilities required and the interface that is presented. The second section of this paper is from the point of view of implementation. This is concerned with the control and optimization of the system's resources: Processors, I/O, and memory. This view of the DAIS Executive is concerned with a given implementation and discusses the characteristics of the current DAIS Executive implementation.
The success of high performance multiple processor systems depends upon the ability to decompose a program into small segments suitable for execution on one processor. It is argued that purely applicative languages ar...
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The success of high performance multiple processor systems depends upon the ability to decompose a program into small segments suitable for execution on one processor. It is argued that purely applicative languages are better suited for parallel processing because they offer considerable advantage over Fortran-like languages in program transformation and decomposition. A scheme for decomposing applicative programs is described through examples.
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