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control-flow Integrity Principles, Implementations, and Applications

ACM TRANSACTIONS ON INFORMATION AND SYSTEM SECURITY 2009年第1期13卷 4-4页

作者： Abadi, Martin Budiu, Mihai Erlingsson, Ulfar Ligatti, Jay Univ Calif Santa Cruz Dept Comp Sci Santa Cruz CA 95064 USA Univ S Florida Dept Comp Sci & Engn Tampa FL 33620 USA Reykjavik Univ Reykjavik Iceland

Current software attacks often build on exploits that subvert machine-code execution. The enforcement of a basic safety property, control-flow integrity (CFI), can prevent such attacks from arbitrarily controlling program behavior. CFI enforcement is simple and its guarantees can be established formally, even with respect to powerful adversaries. Moreover, CFI enforcement is practical: It is compatible with existing software and can be done efficiently using software rewriting in commodity systems. Finally, CFI provides a useful foundation for enforcing further security policies, as we demonstrate with efficient software implementations of a protected shadow call stack and of access control for memory regions.

关键词： Security Languages Verification Binary rewriting control-flow graph inlined reference monitors vulnerabilities

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control-flow integrity 05

Control-flow integrity

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Proceedings of the 12th ACM conference on Computer and communications security

作者： Martín Abadi Mihai Budiu Úlfar Erlingsson Jay Ligatti University of California Santa Cruz Microsoft Research Silicon Valley Princeton University Princeton NJ

ISBN: (纸本)9781595932266

Current software attacks often build on exploits that subvert machine-code execution. The enforcement of a basic safety property, control-flow Integrity (CFI), can prevent such attacks from arbitrarily controlling program behavior. CFI enforcement is simple, and its guarantees can be established formally even with respect to powerful adversaries. Moreover, CFI enforcement is practical: it is compatible with existing software and can be done efficiently using software rewriting in commodity systems. Finally, CFI provides a useful foundation for enforcing further security policies, as we demonstrate with efficient software implementations of a protected shadow call stack and of access control for memory regions.

关键词： vulnerabilities binary rewriting control-flow graph inlined reference monitors

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Paged absolute addressing mode optimizations for embedded digital signal processors using post-pass data-flow analysis

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DESIGN AUTOMATION FOR EMBEDDED SYSTEMS 1999年第1期4卷 41-59页

作者： Sudarsanam, A Malik, S Tjiang, S Liao, S Princeton Univ Dept Elect Engn Princeton NJ 08544 USA Tensilica Inc Cupertino CA USA Synopsys Inc Mountain View CA USA

We address the problem of code generation for embedded DSP systems. In such systems, it is typical for one or more digital signal processors (DSPs), program memory, and custom circuitry to be integrated onto a single IC. Consequently, the amount of silicon area that is dedicated to program memory is limited, so the embedded software must be sufficiently dense. Additionally, this software must be written so as to meet various high-performance constraints, which may include hard real-time constraints. Unfortunately, existing compiler technology is unable to generate dense, high-performance code for DSPs since it does not provide adequate support for the specialized architectural features of DSPs. These specialized features not only allow for the fast execution of common DSP operations, but they also allow for the generation of dense assembly code that specifies these operations. Thus, system designers often hand-program the embedded software in assembly, which is a very time-consuming task. In this paper, we focus on providing compiler support for one particular specialized architectural feature, namely the paged absolute addressing mode - this feature is found in two commercial DSPs, the Texas Instruments' TMS320C25 and TMS320C50 fixed-point DSPs;however, it may also be featured in application-specific processors (ASIPs). We present some machine-dependent code optimizations that improve code density by exploiting this architectural feature. Experimental results demonstrate that for a set of typical DSP benchmarks, some of our optimizations reduce overall code size and data memory consumption by an average of 5.0% and 16.0%, respectively. Our experimental vehicle throughout this research is the TMS320C25.(1)

关键词： basic block code generation control-flow graph data-flow analysis

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Fast scheduling and allocation algorithms for entropy CODEC

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IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS 1997年第10期E80D卷 982-992页

作者： Suzuki, K Togawa, N Sato, M Ohtsuki, T School of Science and Engineering Waseda University Tokyo 169 Japan

Entropy coding/decoding are implemented on FPGAs as a fast and flexible system in which high-level synthesis technologies are key issues. In this paper, we propose scheduling and allocation algorithms for behavioral descriptions of entropy CODEC. The scheduling algorithm employs a control-flow graph as input and finds a solution with minimal hardware cost and execution time by merging nodes in the control-flow graph. The allocation algorithm assigns operations to operators with various bit lengths. As a result, register-transfer level descriptions are efficiently obtained from behavioral descriptions of entropy CODEC with complicated control flow and variable bit lengths. Experimental results demonstrate that our algorithms synthesize the same circuits as manually designed within one second.

关键词： entropy CODEC scheduling allocation control-flow graph

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control-flow versus data-flow-based scheduling: Combining both approaches in an adaptive scheduling system

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IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS 1997年第1期5卷 82-100页

作者： Bergamaschi, RA Raje, S Nair, I Trevillyan, L IBM Thomas J. Watson Res. Center Yorktown Heights NY USA

As high-level synthesis techniques gain acceptance among designers, it is important to be able to provide a robust system which can handle large designs in short execution times, producing high-quality results. Scheduling is one of the most complex tasks in high-level synthesis, and although many algorithms exist for solving the scheduling problem, it remains a main source of inefficiency by either not producing high-quality results, not taking into account realistic design requirements, or requiring unacceptable execution times. One of the main problems in scheduling is the dichotomy between control and data, Many algorithms to date have been able to provide scheduling solutions by looking only at either the data part or the control part of the design. This has been done in order to simplify the problem;however, it has resulted in many algorithms unable to handle efficiently large designs with complex control and data functionality, This paper presents algorithms for combining data-flow and control-how techniques into a robust scheduling system. The main characteristics of this system are as follows: 1) it uses path-based techniques for efficient handling of control and mutual exclusiveness (for resource sharing), 2) it allows operation reordering and parallelism extraction within the context of path-based scheduling, 3) it contains a control partitioning algorithm for design space exploration as well as for reducing the number of control paths, and 4) it combines the above algorithms into an adaptive scheduling system which is capable of trading optimality for execution time on-the-fly, Results involving billions of paths are presented and analyzed.

关键词： control-flow graph data-flow graph high-level synthesis path-based scheduling

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Approximate triclique coloring for register allocation

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INFORMATION PROCESSING LETTERS 1996年第5期60卷 249-253页

作者： Venkatesan, G Rangan, CP INDIAN INST TECHNOL DEPT COMP SCI & ENGNMADRAS 600036TAMIL NADUINDIA

A graph is said to be a triclique if its vertex set can be partitioned into three cliques, i.e. if its complement is tripartite. We prove that the colouring problem is NP-complete even when restricted to tricliques whose complements are planar tripartite line graphs. We then proceed to give a factor 1.5-approximation algorithm for the colouring problem on tricliques. In fact, our algorithm works for all graphs G which satisfy alpha(G) less than or equal to 3 and actually guarantees an approximation ratio that is at most 3/4+n/(4 chi(G)). We then indicate how this problem may be useful in the context of the register allocation problem that arises in compiler design.

关键词： triclique chromatic number register allocation graph (RAG) control-flow graph algorithms approximate algorithms

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REWRITING EXECUTABLE FILES TO MEASURE PROGRAM BEHAVIOR

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SOFTWARE-PRACTICE & EXPERIENCE 1994年第2期24卷 197-218页

作者： LARUS, JR BALL, T Computer Sciences Department University of Wisconsin-Madison 1210 West Dayton Street Madison WI 53706 U.S.A.

Inserting instrumentation code in a program is an effective technique for detecting, recording, an measuring many aspects of a program's performance. Instrumentation code can be added at any stage of the compilation process by specially-modified system tools such as a compiler or linker or by new tools from a measurement system. For several reasons, adding instrumentation code after the compilation process-by rewriting the executable file-presents fewer complications and leads to more complete measurements. This paper describes the difficulties in adding code to executable files that arose in developing the profiling and tracing tools qp and qpt. The techniques used by these tools to instrument programs on MIPS and SPARC processors are applicable in other instrumentation systems running on many processors and operating systems. In addition, many difficulties could have been avoided with minor changes to compilers and executable file formats. These changes would simplify this approach to measuring program performance and make it more generally useful.

关键词： PERFORMANCE MEASUREMENT INSTRUMENTATION control-flow graph EXECUTABLE FILE

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OPTIMALLY PROFILING AND TRACING PROGRAMS

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ACM TRANSACTIONS ON PROGRAMMING LANGUAGES AND SYSTEMS 1994年第4期16卷 1319-1360页

作者： BALL, T LARUS, JR UNIV WISCONSIN DEPT COMP SCIMADISONWI 53706

This paper describes algorithms for inserting monitoring code to profile and trace programs. These algorithms greatly reduce the cost of measuring programs with respect to the commonly used technique of placing code in each basic block. Program profiling counts the number of times each basic block in a program executes. Instruction tracing records the sequence of basic blocks traversed in a program execution. The algorithms optimize the placement of counting/tracing code with respect to the expected or measured frequency of each block or edge in a program's control-flow graph. We have implemented the algorithms in a profiling/tracing tool, and they substantially reduce the overhead of profiling and tracing. We also define and study the hierarchy of profiling problems. These problems have two dimensions: what is profiled (i.e., vertices (basic blocks) or edges in a control-flow graph) and where the instrumentation code is placed (in blocks or along edges). We compare the optimal solutions to the profiling problems and describe a new profiling problem: basic-block profiling with edge counters. This problem is important because an optimal solution to any other profiling problem (for a given control-flow graph) is never better than an optimal solution to this problem. Unfortunately, finding an optimal placement of edge counters for vertex profiling appears to be a hard problem in general. However, our work shows that edge profiling with edge counters works well in practice because it is simple and efficient and finds optimal counter placements in most cases. Furthermore, it yields more information than a vertex profile. Tracing also benefits from placing instrumentation code along edges rather than on vertices.

关键词： ALGORITHMS MEASUREMENT control-flow graph INSTRUCTION TRACING INSTRUMENTATION PROFILING

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EFFICIENTLY COUNTING PROGRAM EVENTS WITH SUPPORT FOR ONLINE QUERIES

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ACM TRANSACTIONS ON PROGRAMMING LANGUAGES AND SYSTEMS 1994年第5期16卷 1399-1410页

作者： BALL, T UNIV WISCONSIN MADISONWI

The ability to count events in a program's execution is required by many program analysis applications. We present an instrumentation method for efficiently counting events in a program's execution, with support for on-line queries of the event count. Event counting differs from basic block profiling in that an aggregate count of events is kept rather than a set of counters. Due to this difference, solutions to basic block profiling are not well suited to event counting. Our algorithm finds a subset of points in a program to instrument, while guaranteeing that accurate event counts can be obtained efficiently at every point in the execution.

关键词： control-flow graph COUNTING INSTRUMENTATION

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