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Joint crosstalk-avoidance and Error-Correction coding for Parallel Data Buses

IEEE TRANSACTIONS ON INFORMATION THEORY 2019年第3期65卷 1626-1638页

作者： Niesen, Urs Kudekar, Shrinivas Qualcomm NJ Res Ctr Bridgewater NJ 08807 USA

Communication in integrated circuits faces two major impediments: inter-wire capacitive coupling and noise. coding can be used to address both these problems. So-called crosstalk-avoidance codes mitigate capacitive coupling, and traditional error-correction codes introduce resilience against channel errors. Unfortunately, crosstalk-avoidance and error-correction codes cannot be combined in a straightforward manner. On the one hand, crosstalk-avoidance encoding followed by error-correction encoding destroys the crosstalk-avoidance property. On the other hand, error-correction encoding followed by crosstalk-avoidance encoding causes the crosstalk-avoidance decoder to fail in the presence of errors. Existing approaches circumvent this difficulty by using additional bus wires to protect the parities generated from the output of the error-correction encoder, and are therefore inefficient. In this paper, we propose a novel joint crosstalk-avoidance and error-correction coding and decoding scheme that provides higher bus transmission rates compared with existing approaches. Our joint approach carefully embeds the parities such that the crosstalk-avoidance property is preserved. We analyze the rate and minimum distance of the proposed scheme. We also provide a density evolution analysis and predict iterative decoding thresholds for reliable communication under random bus erasures. This density evolution analysis is nonstandard, since the crosstalk-avoidance constraints are inherently nonlinear.

关键词： crosstalk-avoidance coding density evolution error-correction coding irregular repeat-accumulate codes on-chip communication

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